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| author | Scott Linder <Scott.Linder@amd.com> | 2025-10-24 20:14:48 +0000 |
|---|---|---|
| committer | Scott Linder <Scott.Linder@amd.com> | 2025-11-04 23:05:46 +0000 |
| commit | 638fa37bcbb86a6645f13c100f1212894226f969 (patch) | |
| tree | 9c967bed03c81f459349eb2bba77b33efce133df | |
| parent | 9c85e6c801aa59ad279545aca62c8efb3a367849 (diff) | |
Add MIR testusers/slinder1/amdgpu-cfi-2
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/cfi-pseudos.mir | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/cfi-pseudos.mir b/llvm/test/CodeGen/AMDGPU/cfi-pseudos.mir new file mode 100644 index 000000000000..313daf5911d5 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/cfi-pseudos.mir @@ -0,0 +1,21 @@ +# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass none -o - %s | \ +# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -x=mir -run-pass none -o - | \ +# RUN: FileCheck %s + +# Verify we can parse and emit these CFI pseudos. + +# CHECK-LABEL: name: test +# CHECK: CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32 +# CHECK-NEXT: CFI_INSTRUCTION llvm_vector_registers $sgpr4, $vgpr3, 0, 32 +# CHECK-NEXT: CFI_INSTRUCTION llvm_vector_registers $pc_reg, $vgpr62, 0, 32, $vgpr62, 1, 32 +# CHECK-NEXT: CFI_INSTRUCTION llvm_vector_offset $vgpr41, 32, $exec, 64, 100 +# CHECK-NEXT: CFI_INSTRUCTION llvm_vector_register_mask $agpr1, $vgpr1, 32, $exec, 64 + +name: test +body: | + bb.0: + CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32 + CFI_INSTRUCTION llvm_vector_registers $sgpr4, $vgpr3, 0, 32 + CFI_INSTRUCTION llvm_vector_registers $pc_reg, $vgpr62, 0, 32, $vgpr62, 1, 32 + CFI_INSTRUCTION llvm_vector_offset $vgpr41, 32, $exec, 64, 100 + CFI_INSTRUCTION llvm_vector_register_mask $agpr1, $vgpr1, 32, $exec, 64 |