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authorMatt Arsenault <Matthew.Arsenault@amd.com>2025-11-21 11:04:29 -0500
committerMatt Arsenault <arsenm2@gmail.com>2025-11-21 11:04:29 -0500
commit1367515b57fdc612767ff1812475bbfbfad4a865 (patch)
tree5bfe5850e6f7816519936a032fa0b4b1e327ef5d
parent16266e1625e766ee4fe8c06e7c54f6cf3f9a74c9 (diff)
-rw-r--r--llvm/test/CodeGen/X86/apx/no-rex2-general.ll26
-rw-r--r--llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll6
-rw-r--r--llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll12
-rw-r--r--llvm/test/CodeGen/X86/apx/no-rex2-special.ll24
4 files changed, 22 insertions, 46 deletions
diff --git a/llvm/test/CodeGen/X86/apx/no-rex2-general.ll b/llvm/test/CodeGen/X86/apx/no-rex2-general.ll
index 2b34739fa80e..801ff5519b22 100644
--- a/llvm/test/CodeGen/X86/apx/no-rex2-general.ll
+++ b/llvm/test/CodeGen/X86/apx/no-rex2-general.ll
@@ -31,13 +31,11 @@ define i32 @map1_or_vex(<2 x double> noundef %a) nounwind {
;
; AVX-LABEL: map1_or_vex:
; AVX: # %bb.0: # %entry
-; AVX-NEXT: pushq %rbx
-; AVX-NEXT: vcvtsd2si %xmm0, %ebx
+; AVX-NEXT: vcvtsd2si %xmm0, %r16d
; AVX-NEXT: #APP
; AVX-NEXT: nop
; AVX-NEXT: #NO_APP
-; AVX-NEXT: movl %ebx, %eax
-; AVX-NEXT: popq %rbx
+; AVX-NEXT: movl %r16d, %eax
; AVX-NEXT: retq
entry:
%0 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a)
@@ -48,30 +46,22 @@ entry:
define <2 x i64> @map2_or_vex(ptr nocapture noundef readonly %b, i64 noundef %c) nounwind {
; SSE-LABEL: map2_or_vex:
; SSE: # %bb.0: # %entry
-; SSE-NEXT: pushq %r14
-; SSE-NEXT: pushq %rbx
-; SSE-NEXT: movq %rsi, %rbx
-; SSE-NEXT: movq %rdi, %r14
+; SSE-NEXT: movq %rsi, %r16
+; SSE-NEXT: movq %rdi, %r17
; SSE-NEXT: #APP
; SSE-NEXT: nop
; SSE-NEXT: #NO_APP
-; SSE-NEXT: pabsb (%r14,%rbx,4), %xmm0
-; SSE-NEXT: popq %rbx
-; SSE-NEXT: popq %r14
+; SSE-NEXT: pabsb (%r17,%r16,4), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: map2_or_vex:
; AVX: # %bb.0: # %entry
-; AVX-NEXT: pushq %r14
-; AVX-NEXT: pushq %rbx
-; AVX-NEXT: movq %rsi, %rbx
-; AVX-NEXT: movq %rdi, %r14
+; AVX-NEXT: movq %rsi, %r16
+; AVX-NEXT: movq %rdi, %r17
; AVX-NEXT: #APP
; AVX-NEXT: nop
; AVX-NEXT: #NO_APP
-; AVX-NEXT: vpabsb (%r14,%rbx,4), %xmm0
-; AVX-NEXT: popq %rbx
-; AVX-NEXT: popq %r14
+; AVX-NEXT: vpabsb (%r17,%r16,4), %xmm0
; AVX-NEXT: retq
entry:
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{edx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
diff --git a/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll b/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll
index c193680607f7..c10230844f7a 100644
--- a/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll
+++ b/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll
@@ -4,14 +4,12 @@
define dso_local void @amx(ptr noundef %data) nounwind {
; CHECK-LABEL: amx:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: pushq %rbx
-; CHECK-NEXT: movq %rdi, %rbx
+; CHECK-NEXT: movq %rdi, %r16
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl $8, %eax
-; CHECK-NEXT: tileloadd (%rbx,%rax), %tmm4
-; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: tileloadd (%r16,%rax), %tmm4
; CHECK-NEXT: retq
entry:
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{edx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
diff --git a/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll b/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll
index 4692a58d095a..0ec438e6c765 100644
--- a/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll
+++ b/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll
@@ -4,17 +4,13 @@
define void @x87(ptr %0, ptr %1) nounwind {
; CHECK-LABEL: x87:
; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %r14
-; CHECK-NEXT: pushq %rbx
-; CHECK-NEXT: movq %rsi, %rbx
-; CHECK-NEXT: movq %rdi, %r14
+; CHECK-NEXT: movq %rsi, %r16
+; CHECK-NEXT: movq %rdi, %r17
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: flds (%r14)
-; CHECK-NEXT: fstps (%rbx)
-; CHECK-NEXT: popq %rbx
-; CHECK-NEXT: popq %r14
+; CHECK-NEXT: flds (%r17)
+; CHECK-NEXT: fstps (%r16)
; CHECK-NEXT: retq
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{edx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
%3 = load float, ptr %0
diff --git a/llvm/test/CodeGen/X86/apx/no-rex2-special.ll b/llvm/test/CodeGen/X86/apx/no-rex2-special.ll
index f2025b5c8cbf..1171a6117f04 100644
--- a/llvm/test/CodeGen/X86/apx/no-rex2-special.ll
+++ b/llvm/test/CodeGen/X86/apx/no-rex2-special.ll
@@ -4,16 +4,14 @@
define void @test_xsave(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xsave:
; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: movl %edx, %r16d
; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: movq %rdi, %rbx
+; CHECK-NEXT: movq %rdi, %r17
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl %r16d, %eax
-; CHECK-NEXT: xsave (%rbx)
-; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: xsave (%r17)
; CHECK-NEXT: retq
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
call void @llvm.x86.xsave(ptr %ptr, i32 %hi, i32 %lo)
@@ -24,16 +22,14 @@ declare void @llvm.x86.xsave(ptr, i32, i32)
define void @test_xsave64(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xsave64:
; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: movl %edx, %r16d
; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: movq %rdi, %rbx
+; CHECK-NEXT: movq %rdi, %r17
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl %r16d, %eax
-; CHECK-NEXT: xsave64 (%rbx)
-; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: xsave64 (%r17)
; CHECK-NEXT: retq
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
call void @llvm.x86.xsave64(ptr %ptr, i32 %hi, i32 %lo)
@@ -44,16 +40,14 @@ declare void @llvm.x86.xsave64(ptr, i32, i32)
define void @test_xrstor(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xrstor:
; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: movl %edx, %r16d
; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: movq %rdi, %rbx
+; CHECK-NEXT: movq %rdi, %r17
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl %r16d, %eax
-; CHECK-NEXT: xrstor (%rbx)
-; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: xrstor (%r17)
; CHECK-NEXT: retq
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
call void @llvm.x86.xrstor(ptr %ptr, i32 %hi, i32 %lo)
@@ -64,16 +58,14 @@ declare void @llvm.x86.xrstor(ptr, i32, i32)
define void @test_xrstor64(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xrstor64:
; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: movl %edx, %r16d
; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: movq %rdi, %rbx
+; CHECK-NEXT: movq %rdi, %r17
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: movl %r16d, %eax
-; CHECK-NEXT: xrstor64 (%rbx)
-; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: xrstor64 (%r17)
; CHECK-NEXT: retq
tail call void asm sideeffect "nop", "~{eax},~{ecx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()
call void @llvm.x86.xrstor64(ptr %ptr, i32 %hi, i32 %lo)