* Adds lowerings for amdgpy.scaled_ext_packed816
* updates verifiers

Update `amdgpu.wmma` op definition and implement amdgpu to rocdl
conversion for new variants.

Use the same format as introduced for wmma by
https://github.com/llvm/llvm-project/pull/164920.

Also make `blocks` default to 1.

This is in preparation for adding support for gfx1250 wmma intrinsics
that include much more possible shapes.

Instead of guessing the wave32/wave64 mode based on element types and
vector sizes, require the intrinsic shapes to be set explicitly as
attributes.

Improving choice of class used, from SmallVector to ArrayRef
(https://llvm.org/docs/ProgrammersManual.html#llvm-adt-arrayref-h). Also infer template types when possible.
Leftover from https://github.com/llvm/llvm-project/pull/155951.

---------

Signed-off-by: Muzammiluddin Syed <muzasyed@amd.com>

All the `amdgpu` dialect ops can be inlined.

---------

Signed-off-by: Ivan Butygin <ivan.butygin@gmail.com>

The ScaledMFMAOp accepts scales as a vector of 4 bytes
(`vector<4xf8E8M0FNU>`) that can be stored in a single register with a
particular scale accessed using the `OpSel` attribute. Currently, we
only use one byte in this 4-byte vector, resulting in 3 wasted
registers.

This is fixed by identifying when single byte extractions are performed
and rewriting them into extractions of 4-byte vectors.

Example:
```
  %unit = vector.extract %ScaleSrc[offsets] : f8E8M0FNU from vector<?x?x?xf8E8M0FNU>
  %scale = vector.insert %unit, ... : f8E8M0FNU into vector<4xf8E8M0FNU>
  amdgpu.scaled_mfma(%scale[0] * ...
```
to
```
  %reshaped = vector.shape_cast %ScaleSrc : vector<?x?x?xf8E8M0FNU> to vector<?x4xf8E8M0FNU> 
  %scale = vector.extract %reshaped[?] : vector<4xf8E8M0FNU> from vector<?x4xf8E8M0FNU>
  amdgpu.scaled_mfma(%scale[0-3] * ...
```

---------

Signed-off-by: Muzammiluddin Syed <muzasyed@amd.com>