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<entry>
<title>[MLIR] [XeGPU] Fix dropSgLayoutAndData &amp; dropInstData in SliceAttr (#168618)</title>
<updated>2025-11-21T20:40:16+00:00</updated>
<author>
<name>Nishant Patel</name>
<email>nishant.b.patel@intel.com</email>
</author>
<published>2025-11-21T20:40:16+00:00</published>
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<pre>
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<entry>
<title>[mlir][presburger] Fix PresburgerSpace comment (#167292)</title>
<updated>2025-11-21T20:12:24+00:00</updated>
<author>
<name>lonely eagle</name>
<email>2020382038@qq.com</email>
</author>
<published>2025-11-21T20:12:24+00:00</published>
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<entry>
<title>[acc][flang] Implement acc interface for tracking type descriptors (#168982)</title>
<updated>2025-11-21T15:40:04+00:00</updated>
<author>
<name>Razvan Lupusoru</name>
<email>razvan.lupusoru@gmail.com</email>
</author>
<published>2025-11-21T15:40:04+00:00</published>
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<content type='text'>
FIR operations that use derived types need to have type descriptor
globals available on device when offloading. Examples of this can be
seen in `CUFDeviceGlobal` which ensures that such type descriptor uses
work on device for CUF.

Similarly, this is needed for OpenACC. This change introduces a new
interface to the OpenACC dialect named
`IndirectGlobalAccessOpInterface` which can be attached to operations
that may result in generation of accesses that use type descriptor
globals. This functionality is needed for the `ACCImplicitDeclare` pass
that is coming in a follow-up change which implicitly ensures that all
referenced globals are available in OpenACC compute contexts.

The interface provides a `getReferencedSymbols` method that collects all
global symbols referenced by an operation. When a symbol table is
provided, the implementation for FIR recursively walks type descriptor
globals to find all transitively referenced symbols.

Note that alternately this could have been implemented in different
ways:
- Codegen could implicitly generate such type globals as needed by
changing the technique that relies on populating them during lowering
(eg generate them directly in gpu.module during codegen).
- This interface could attach to types instead of operations for a
potentially more conservative implementation which maps all type
descriptors even if the underlying implementation using it won't
necessarily need such mapping.

The technique chosen here is consistent with `CUFDeviceGlobal` (which
walks operations inside `prepareImplicitDeviceGlobals`) and avoids
conservative mapping of all type descriptors.</content>
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<pre>
FIR operations that use derived types need to have type descriptor
globals available on device when offloading. Examples of this can be
seen in `CUFDeviceGlobal` which ensures that such type descriptor uses
work on device for CUF.

Similarly, this is needed for OpenACC. This change introduces a new
interface to the OpenACC dialect named
`IndirectGlobalAccessOpInterface` which can be attached to operations
that may result in generation of accesses that use type descriptor
globals. This functionality is needed for the `ACCImplicitDeclare` pass
that is coming in a follow-up change which implicitly ensures that all
referenced globals are available in OpenACC compute contexts.

The interface provides a `getReferencedSymbols` method that collects all
global symbols referenced by an operation. When a symbol table is
provided, the implementation for FIR recursively walks type descriptor
globals to find all transitively referenced symbols.

Note that alternately this could have been implemented in different
ways:
- Codegen could implicitly generate such type globals as needed by
changing the technique that relies on populating them during lowering
(eg generate them directly in gpu.module during codegen).
- This interface could attach to types instead of operations for a
potentially more conservative implementation which maps all type
descriptors even if the underlying implementation using it won't
necessarily need such mapping.

The technique chosen here is consistent with `CUFDeviceGlobal` (which
walks operations inside `prepareImplicitDeviceGlobals`) and avoids
conservative mapping of all type descriptors.</pre>
</div>
</content>
</entry>
<entry>
<title>[mlir][ROCDL] Adds wmma scaled intrinsics for gfx1250 (#165915)</title>
<updated>2025-11-21T15:04:29+00:00</updated>
<author>
<name>Muzammiluddin Syed</name>
<email>muzasyed@amd.com</email>
</author>
<published>2025-11-21T15:04:29+00:00</published>
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<id>77c329f54ca5cc884001e216afa47990aad27de4</id>
<content type='text'>
Signed-off-by: Muzammiluddin Syed &lt;muzasyed@amd.com&gt;</content>
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<pre>
Signed-off-by: Muzammiluddin Syed &lt;muzasyed@amd.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[MLIR][GPU] subgroup_mma fp64 extension" (#169049)</title>
<updated>2025-11-21T15:02:59+00:00</updated>
<author>
<name>Fabian Mora</name>
<email>fmora.dev@gmail.com</email>
</author>
<published>2025-11-21T15:02:59+00:00</published>
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<id>8c3f59f1b297ec65b5870ebfd727a40f632de966</id>
<content type='text'>
Reverts llvm/llvm-project#165873

The revert is triggered by a failing integration test on a couple of
buildbots.</content>
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<pre>
Reverts llvm/llvm-project#165873

The revert is triggered by a failing integration test on a couple of
buildbots.</pre>
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</entry>
<entry>
<title>[MLIR][GPU] subgroup_mma fp64 extension (#165873)</title>
<updated>2025-11-21T14:07:43+00:00</updated>
<author>
<name>Giacomo Castiglioni</name>
<email>giacastiglioni@gmail.com</email>
</author>
<published>2025-11-21T14:07:43+00:00</published>
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<id>49995b2af0abbec1095031dfe9eb049945b6d4f7</id>
<content type='text'>
This PR extends the `gpu.subgroup_mma_*` ops to support fp64 type.
The extension requires special handling during the lowering to `nvvm`
due to the return type for load ops for fragment a and b (they return a
scalar instead of a struct).</content>
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<pre>
This PR extends the `gpu.subgroup_mma_*` ops to support fp64 type.
The extension requires special handling during the lowering to `nvvm`
due to the return type for load ops for fragment a and b (they return a
scalar instead of a struct).</pre>
</div>
</content>
</entry>
<entry>
<title>[mlir][py][c] Enable setting block arg locations. (#169033)</title>
<updated>2025-11-21T13:31:46+00:00</updated>
<author>
<name>Jacques Pienaar</name>
<email>jpienaar@google.com</email>
</author>
<published>2025-11-21T13:31:46+00:00</published>
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<id>5ab49edde282814f41b90431194afaff694deba7</id>
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This enables changing the location of a block argument. Follows the
approach for updating type of block arg.</content>
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<pre>
This enables changing the location of a block argument. Follows the
approach for updating type of block arg.</pre>
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</content>
</entry>
<entry>
<title>[MLIR][XeGPU][TransformOps] Add slice_dims argument to set_op_layout_attr and set_desc_layout (#168929)</title>
<updated>2025-11-21T08:08:12+00:00</updated>
<author>
<name>Tuomas Kärnä</name>
<email>tuomas.karna@intel.com</email>
</author>
<published>2025-11-21T08:08:12+00:00</published>
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<content type='text'>
`set_op_layout_attr` and `set_desc_layout` transform ops wrap
`xegpu.layout` in an `xegpu.slice` attribute if `slice_dims` argument is
set.</content>
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<pre>
`set_op_layout_attr` and `set_desc_layout` transform ops wrap
`xegpu.layout` in an `xegpu.slice` attribute if `slice_dims` argument is
set.</pre>
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</content>
</entry>
<entry>
<title>[mlir][llvm] Handle debug record import edge cases (#168774)</title>
<updated>2025-11-21T07:54:45+00:00</updated>
<author>
<name>Tobias Gysi</name>
<email>tobias.gysi@nextsilicon.com</email>
</author>
<published>2025-11-21T07:54:45+00:00</published>
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<content type='text'>
This commit enables the direct import of debug records by default and
fixes issues with two edge cases:
- Detect early on if the address operand is an argument list (calling
getAddress() for argument lists asserts)
- Use getAddress() to check if the address operand is null, which means
the address operand is an empty metadata node, which currently is not
supported.
- Add support for debug label records.

This is a follow-up to:
https://github.com/llvm/llvm-project/pull/167812</content>
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<pre>
This commit enables the direct import of debug records by default and
fixes issues with two edge cases:
- Detect early on if the address operand is an argument list (calling
getAddress() for argument lists asserts)
- Use getAddress() to check if the address operand is null, which means
the address operand is an empty metadata node, which currently is not
supported.
- Add support for debug label records.

This is a follow-up to:
https://github.com/llvm/llvm-project/pull/167812</pre>
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</content>
</entry>
<entry>
<title>[mlir][linalg] Clean up op verifiers without custom checks(NFC) (#168712)</title>
<updated>2025-11-21T02:05:20+00:00</updated>
<author>
<name>Longsheng Mou</name>
<email>longshengmou@gmail.com</email>
</author>
<published>2025-11-21T02:05:20+00:00</published>
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This PR removes op verifiers that do not implement any custom
verification logic.</content>
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<pre>
This PR removes op verifiers that do not implement any custom
verification logic.</pre>
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