<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm-project.git/llvm/utils, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[TableGen] More generically handle tied source operands in CompressInstEmitter. (#146183)</title>
<updated>2025-07-02T20:09:35+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-07-02T20:09:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6ff3b43700175dbff8f2e4b63c6f27835418e20c'/>
<id>6ff3b43700175dbff8f2e4b63c6f27835418e20c</id>
<content type='text'>
Move the creation of OperandMap from createDagOperandMapping to the loop
in addDagOperandMapping. Expand it to store the DAG operand number and
the MI operand number which will be different when there are tied
operands.

Rename createDagOperandMapping to checkDagOperandMapping to better
describe the remaining code.

I didn't lift the restriction that a source instruction can only have
one tied operand, but we should be able to if we have a use case.

There's a slight difference in the generate output. We now check that
operand 0 and 2 of QC_MVEQI are equal instead of operand 1 and 2. This
should be equivalent since operand 0 and 1 have a tied constraint.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move the creation of OperandMap from createDagOperandMapping to the loop
in addDagOperandMapping. Expand it to store the DAG operand number and
the MI operand number which will be different when there are tied
operands.

Rename createDagOperandMapping to checkDagOperandMapping to better
describe the remaining code.

I didn't lift the restriction that a source instruction can only have
one tied operand, but we should be able to if we have a use case.

There's a slight difference in the generate output. We now check that
operand 0 and 2 of QC_MVEQI are equal instead of operand 1 and 2. This
should be equivalent since operand 0 and 1 have a tied constraint.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][TableGen] Add accessors for various instruction subclasses (#146615)</title>
<updated>2025-07-02T19:49:27+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-07-02T19:49:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a880c8e670befc20dfb6e0789e8dfb93aa06173c'/>
<id>a880c8e670befc20dfb6e0789e8dfb93aa06173c</id>
<content type='text'>
- Add various instruction subclass/sub-slice accessors to
`CodeGenTarget`.
- Delete unused `inst_begin` and `inst_end` iterators.
- Rename `Instructions` to `InstructionMap` and `getInstructions` to
`getInstructionMap` to better represent their meaning.
- Use these new accessors in InstrInfoEmitter</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Add various instruction subclass/sub-slice accessors to
`CodeGenTarget`.
- Delete unused `inst_begin` and `inst_end` iterators.
- Rename `Instructions` to `InstructionMap` and `getInstructions` to
`getInstructionMap` to better represent their meaning.
- Use these new accessors in InstrInfoEmitter</pre>
</div>
</content>
</entry>
<entry>
<title>[lldb][NFC][MachO] Clean up LC_THREAD reading code, remove i386 corefile (#146480)</title>
<updated>2025-07-02T17:21:38+00:00</updated>
<author>
<name>Jason Molenda</name>
<email>jmolenda@apple.com</email>
</author>
<published>2025-07-02T17:21:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=dfcef35ff1d30d112362645ec2cd0d5e99952b0f'/>
<id>dfcef35ff1d30d112362645ec2cd0d5e99952b0f</id>
<content type='text'>
While fixing bugs in the x86_64 LC_THREAD parser in ObjectFileMachO, I
noticed that the other LC_THREAD parsers are all less clear than they
should be.

To recap, a Mach-O LC_THREAD load command has a byte size for the entire
payload. Within the payload, there will be one or more register sets
provided. A register set starts with a UInt32 "flavor", the type of
register set defined in the system headers, and a UInt32 "count", the
number of UInt32 words of memory for this register set. After one
register set, there may be additional sets. A parser can skip an unknown
register set flavor by using the count field to get to the next register
set. When the total byte size of the LC_THREAD load command has been
parsed, it is completed.

This patch fixes the riscv/arm/arm64 LC_THREAD parsers to use the total
byte size as the exit condition, and to skip past unrecognized register
sets, instead of stopping parsing.

Instead of fixing the i386 corefile support, I removed it. The last
macOS that supported 32-bit Intel code was macOS 10.14 in 2018. I also
removed i386 KDP support, 32-bit intel kernel debugging hasn't been
supported for even longer than that.

It would be preferable to do these things separately, but I couldn't
bring myself to update the i386 LC_THREAD parser, and it required very
few changes to remove this support entirely.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
While fixing bugs in the x86_64 LC_THREAD parser in ObjectFileMachO, I
noticed that the other LC_THREAD parsers are all less clear than they
should be.

To recap, a Mach-O LC_THREAD load command has a byte size for the entire
payload. Within the payload, there will be one or more register sets
provided. A register set starts with a UInt32 "flavor", the type of
register set defined in the system headers, and a UInt32 "count", the
number of UInt32 words of memory for this register set. After one
register set, there may be additional sets. A parser can skip an unknown
register set flavor by using the count field to get to the next register
set. When the total byte size of the LC_THREAD load command has been
parsed, it is completed.

This patch fixes the riscv/arm/arm64 LC_THREAD parsers to use the total
byte size as the exit condition, and to skip past unrecognized register
sets, instead of stopping parsing.

Instead of fixing the i386 corefile support, I removed it. The last
macOS that supported 32-bit Intel code was macOS 10.14 in 2018. I also
removed i386 KDP support, 32-bit intel kernel debugging hasn't been
supported for even longer than that.

It would be preferable to do these things separately, but I couldn't
bring myself to update the i386 LC_THREAD parser, and it required very
few changes to remove this support entirely.</pre>
</div>
</content>
</entry>
<entry>
<title>[LLVM][TableGen][DecoderEmitter] Add wrapper struct for `bit_value_t` (#146248)</title>
<updated>2025-07-01T14:36:17+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-07-01T14:36:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=d7b8b65e239f3daa08c767f899cbfd7ca2871a0d'/>
<id>d7b8b65e239f3daa08c767f899cbfd7ca2871a0d</id>
<content type='text'>
Add a convenience wrapper struct for the `bit_value_t` enum type to host
various constructors, query, and printing support. Also refactor related
code in several places. In `getBitsField`, use `llvm::append_range` and
`SmallVector::append()` and eliminate manual loops. Eliminate
`emitNameWithID` and instead use the `operator &lt;&lt;` that does the same
thing as this function. Have `BitValue::getValue()` (replacement for
`Value`) return std::optional&lt;&gt; instead of -1 for unset bits. Terminate
with a fatal error when a decoding conflict is encountered.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a convenience wrapper struct for the `bit_value_t` enum type to host
various constructors, query, and printing support. Also refactor related
code in several places. In `getBitsField`, use `llvm::append_range` and
`SmallVector::append()` and eliminate manual loops. Eliminate
`emitNameWithID` and instead use the `operator &lt;&lt;` that does the same
thing as this function. Have `BitValue::getValue()` (replacement for
`Value`) return std::optional&lt;&gt; instead of -1 for unset bits. Terminate
with a fatal error when a decoding conflict is encountered.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][TableGen] Capitalize `to` in `UseFnTableInDecodetoMCInst`. (#146419)</title>
<updated>2025-06-30T23:12:15+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-06-30T23:12:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=92b50959da32c23531a0138f51db97235925376e'/>
<id>92b50959da32c23531a0138f51db97235925376e</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[gn build] Port f8cb7987c64d</title>
<updated>2025-06-30T11:31:31+00:00</updated>
<author>
<name>LLVM GN Syncbot</name>
<email>llvmgnsyncbot@gmail.com</email>
</author>
<published>2025-06-30T11:31:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e810c639febc759e7007104495093fbcd20e961a'/>
<id>e810c639febc759e7007104495093fbcd20e961a</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[gn] port b42c8831d57a</title>
<updated>2025-06-30T11:31:17+00:00</updated>
<author>
<name>Nico Weber</name>
<email>thakis@chromium.org</email>
</author>
<published>2025-06-30T11:31:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a4647b21f2cbb89283a4e84b0d8a167ebcbe5e3c'/>
<id>a4647b21f2cbb89283a4e84b0d8a167ebcbe5e3c</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[gn build] Port a64db49371f0</title>
<updated>2025-06-30T08:31:22+00:00</updated>
<author>
<name>LLVM GN Syncbot</name>
<email>llvmgnsyncbot@gmail.com</email>
</author>
<published>2025-06-30T08:31:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7ec494e9bde8e4dc09deba871ed271141794559f'/>
<id>7ec494e9bde8e4dc09deba871ed271141794559f</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[gn build] Port a3a60e03e2bf</title>
<updated>2025-06-30T08:31:21+00:00</updated>
<author>
<name>LLVM GN Syncbot</name>
<email>llvmgnsyncbot@gmail.com</email>
</author>
<published>2025-06-30T08:31:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=96fc0b3a329cb3f6efeb9a53fa9888f4ab67a69a'/>
<id>96fc0b3a329cb3f6efeb9a53fa9888f4ab67a69a</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[gn build] Port 3f531552e66f</title>
<updated>2025-06-30T08:31:20+00:00</updated>
<author>
<name>LLVM GN Syncbot</name>
<email>llvmgnsyncbot@gmail.com</email>
</author>
<published>2025-06-30T08:31:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=22064ce53eb5c406baa4cbfdd471c2a808bc4e08'/>
<id>22064ce53eb5c406baa4cbfdd471c2a808bc4e08</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
</feed>
