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<title>llvm-project.git/llvm/utils/TableGen/SubtargetEmitter.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[MC] Use StringTable to reduce dynamic relocations (#144202)</title>
<updated>2025-06-25T12:23:11+00:00</updated>
<author>
<name>Reid Kleckner</name>
<email>rnk@google.com</email>
</author>
<published>2025-06-25T12:23:11+00:00</published>
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<id>bb7242477c2f36195b53018b58a77f1dc12ffb06</id>
<content type='text'>
Dynamic relocations are expensive on ELF/Linux platforms because they
are applied in userspace on process startup. Therefore, it is worth
optimizing them to make PIE and PIC dylib builds faster. In +asserts
builds (non-NDEBUG), nikic identified these schedule class name string
pointers as the leading source of dynamic relocations. [1]

This change uses llvm::StringTable and the StringToOffsetTable TableGen
helper to turn the string pointers into 32-bit offsets into a separate
character array.

The number of dynamic relocations is reduced by ~60%:
❯ llvm-readelf --dyn-relocations lib/libLLVM.so | wc -l
381376 # before
155156 # after

The test suite time is modestly affected, but I'm running on a shared
noisy workstation VM with a ton of cores:
https://gist.github.com/rnk/f38882c2fe2e63d0eb58b8fffeab69de
Testing Time: 100.88s   # before
Testing Time: 78.50s. # after
Testing Time: 96.25s.  # before again

I haven't used any fancy hyperfine/denoising tools, but I think the
result is clearly visible and we should ship it.

[1] https://gist.github.com/nikic/554f0a544ca15d5219788f1030f78c5a</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Dynamic relocations are expensive on ELF/Linux platforms because they
are applied in userspace on process startup. Therefore, it is worth
optimizing them to make PIE and PIC dylib builds faster. In +asserts
builds (non-NDEBUG), nikic identified these schedule class name string
pointers as the leading source of dynamic relocations. [1]

This change uses llvm::StringTable and the StringToOffsetTable TableGen
helper to turn the string pointers into 32-bit offsets into a separate
character array.

The number of dynamic relocations is reduced by ~60%:
❯ llvm-readelf --dyn-relocations lib/libLLVM.so | wc -l
381376 # before
155156 # after

The test suite time is modestly affected, but I'm running on a shared
noisy workstation VM with a ton of cores:
https://gist.github.com/rnk/f38882c2fe2e63d0eb58b8fffeab69de
Testing Time: 100.88s   # before
Testing Time: 78.50s. # after
Testing Time: 96.25s.  # before again

I haven't used any fancy hyperfine/denoising tools, but I think the
result is clearly visible and we should ship it.

[1] https://gist.github.com/nikic/554f0a544ca15d5219788f1030f78c5a</pre>
</div>
</content>
</entry>
<entry>
<title>[Reland] [PowerPC] frontend get target feature from backend with cpu name (#144594)</title>
<updated>2025-06-19T13:22:16+00:00</updated>
<author>
<name>zhijian lin</name>
<email>zhijian@ca.ibm.com</email>
</author>
<published>2025-06-19T13:22:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=bf79d4819edeb54c6cf528db63676110992908a8'/>
<id>bf79d4819edeb54c6cf528db63676110992908a8</id>
<content type='text'>
1. The PR proceeds with a backend target hook to allow front-ends to
determine what target features are available in a compilation based on
the CPU name.
2. Fix a backend target feature bug that supports HTM for
Power8/9/10/11. However, HTM is only supported on Power8/9 according to
the ISA.
3. All target features that are hardcoded in PPC.cpp can be retrieved
from the backend target feature. I have double-checked that the
hardcoded logic for inferring target features from the CPU in the
frontend(PPC.cpp) is the same as in PPC.td.

The reland patch addressed the comment
https://github.com/llvm/llvm-project/pull/137670#discussion_r2143541120</content>
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<pre>
1. The PR proceeds with a backend target hook to allow front-ends to
determine what target features are available in a compilation based on
the CPU name.
2. Fix a backend target feature bug that supports HTM for
Power8/9/10/11. However, HTM is only supported on Power8/9 according to
the ISA.
3. All target features that are hardcoded in PPC.cpp can be retrieved
from the backend target feature. I have double-checked that the
hardcoded logic for inferring target features from the CPU in the
frontend(PPC.cpp) is the same as in PPC.td.

The reland patch addressed the comment
https://github.com/llvm/llvm-project/pull/137670#discussion_r2143541120</pre>
</div>
</content>
</entry>
<entry>
<title>Revert " [PowerPC] frontend get target feature from backend with cpu name (#137670)"</title>
<updated>2025-06-12T19:56:41+00:00</updated>
<author>
<name>Reid Kleckner</name>
<email>rnk@google.com</email>
</author>
<published>2025-06-12T19:53:04+00:00</published>
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<id>cbf27bf711c08c34185f05ca5edbfa61bd3786e2</id>
<content type='text'>
This reverts commit 9208b343e962b9f1140ee345c0050a3920bdcbf2.

TargetParser shouldn't re-run the PPC subtarget tablegen target, it
should define its own `-gen-ppc-target-def` rule like all the other
targets do in llvm/include/llvm/TargetParser/CMakeLists.txt .

One user reported that there are incorrect CMake dependencies after this
change, so I will roll this back in the meantime.
</content>
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<pre>
This reverts commit 9208b343e962b9f1140ee345c0050a3920bdcbf2.

TargetParser shouldn't re-run the PPC subtarget tablegen target, it
should define its own `-gen-ppc-target-def` rule like all the other
targets do in llvm/include/llvm/TargetParser/CMakeLists.txt .

One user reported that there are incorrect CMake dependencies after this
change, so I will roll this back in the meantime.
</pre>
</div>
</content>
</entry>
<entry>
<title> [PowerPC] frontend get target feature from backend with cpu name (#137670)</title>
<updated>2025-06-12T17:38:13+00:00</updated>
<author>
<name>zhijian lin</name>
<email>zhijian@ca.ibm.com</email>
</author>
<published>2025-06-12T17:38:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9208b343e962b9f1140ee345c0050a3920bdcbf2'/>
<id>9208b343e962b9f1140ee345c0050a3920bdcbf2</id>
<content type='text'>
1. The PR proceeds with a backend target hook to allow front-ends to
determine what target features are available in a compilation based on
the CPU name.
2. Fix a backend target feature bug that supports HTM for
Power8/9/10/11. However, HTM is only supported on Power8/9 according to
the ISA.
3. All target features that are hardcoded in PPC.cpp can be retrieved
from the backend target feature. I have double-checked that the
hardcoded logic for inferring target features from the CPU in the
frontend(PPC.cpp) is the same as in PPC.td.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
1. The PR proceeds with a backend target hook to allow front-ends to
determine what target features are available in a compilation based on
the CPU name.
2. Fix a backend target feature bug that supports HTM for
Power8/9/10/11. However, HTM is only supported on Power8/9 according to
the ISA.
3. All target features that are hardcoded in PPC.cpp can be retrieved
from the backend target feature. I have double-checked that the
hardcoded logic for inferring target features from the CPU in the
frontend(PPC.cpp) is the same as in PPC.td.
</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Remove unused includes (NFC) (#141356)</title>
<updated>2025-05-24T16:37:40+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-05-24T16:37:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=252bd8087193751fc43eebe5724f6de280f0c4cc'/>
<id>252bd8087193751fc43eebe5724f6de280f0c4cc</id>
<content type='text'>
These are identified by misc-include-cleaner.  I've filtered out those
that break builds.  Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.</content>
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<pre>
These are identified by misc-include-cleaner.  I've filtered out those
that break builds.  Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][TableGen] Use StringRef::str() instead of casting (#139332)</title>
<updated>2025-05-12T22:41:27+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-05-12T22:41:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9981afc5f9d1bb84e35d562f2a1d0f6bf56fcb58'/>
<id>9981afc5f9d1bb84e35d562f2a1d0f6bf56fcb58</id>
<content type='text'>
- Also eliminate unneeded std::string() around some literal strings.</content>
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<pre>
- Also eliminate unneeded std::string() around some literal strings.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][TableGen] Add {} for `else` when `if` body has {} (#139420)</title>
<updated>2025-05-12T15:34:12+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-05-12T15:34:12+00:00</published>
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<id>2e8b539e7138122ae6bd54a2dddc296386bd7e28</id>
<content type='text'>
</content>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Print a warning when a Processor contains duplicate Features / TuneFeatures (#137864)</title>
<updated>2025-04-29T23:22:48+00:00</updated>
<author>
<name>Min-Yih Hsu</name>
<email>min.hsu@sifive.com</email>
</author>
<published>2025-04-29T23:22:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=951292be2c21bc903e63729338d872a878d2d49c'/>
<id>951292be2c21bc903e63729338d872a878d2d49c</id>
<content type='text'>
I don't think a processor should normally contains duplicate features. This patch prints a warning whenever that happens in either the features or tune features.</content>
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<pre>
I don't think a processor should normally contains duplicate features. This patch prints a warning whenever that happens in either the features or tune features.</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen][MCSched] Update error messages on the range of Acquire/ReleaseAtCycle (#131908)</title>
<updated>2025-03-24T20:42:28+00:00</updated>
<author>
<name>Min-Yih Hsu</name>
<email>min.hsu@sifive.com</email>
</author>
<published>2025-03-24T20:42:28+00:00</published>
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<id>7fa104ed20a576a792162e8ac677c1543032d8f1</id>
<content type='text'>
I was looking at the value range of AcquireAtCycle / ReleaseAtCycle, and
I noticed that while the TableGen error messages said AcquireAtCycle has
to be less than ReleaseAtCycle, in reality they are actually allowed to
be the same. This patch fixes it and add more test cases.</content>
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<pre>
I was looking at the value range of AcquireAtCycle / ReleaseAtCycle, and
I noticed that while the TableGen error messages said AcquireAtCycle has
to be less than ReleaseAtCycle, in reality they are actually allowed to
be the same. This patch fixes it and add more test cases.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][TableGen] Eliminate use of `ConstRecIter` from SubtargetEmitter (#130162)</title>
<updated>2025-03-10T19:23:25+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-03-10T19:23:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8f0293695f783ec9dd0bd7532e1556edbbf6cfea'/>
<id>8f0293695f783ec9dd0bd7532e1556edbbf6cfea</id>
<content type='text'>
- Eliminate use of `ConstRecIter` from `expandProcResources` by using `all_of()` to simplify the code.</content>
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<pre>
- Eliminate use of `ConstRecIter` from `expandProcResources` by using `all_of()` to simplify the code.</pre>
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</content>
</entry>
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