This improves type safety and is less verbose. Use SimpleTy only where
an integer is needed like switches or emitting a VBR.

---------

Co-authored-by: Sergei Barannikov <barannikov88@gmail.com>

This is a generalization of the LookupPtrRegClass mechanism.
AMDGPU has several use cases for swapping the register class of
instruction operands based on the subtarget, but none of them
really fit into the box of being pointer-like.

The current system requires manual management of an arbitrary integer
ID. For the AMDGPU use case, this would end up being around 40 new
entries to manage.

This just introduces the base infrastructure. I have ports of all
the target specific usage of PointerLikeRegClass ready.

Co-authored-by: Matt Arsenault <arsenm2@gmail.com>

Solves unused variable error in generated Global ISel code due to
changes from #140935

This method doesn't use anything from CodeGenTarget, so it seems to
belong in CodeGenRegBank.

Previously PatLeafs could not be imported, causing the following
warnings to be emitted when running tblgen with
`-warn-on-skipped-patterns:`
```
/work/clean/llvm/lib/Target/AArch64/AArch64InstrInfo.td:2631:1: warning: Skipped pattern: Src pattern child has unsupported predicate
def : Pat<(i64 (mul top32Zero:$Rn, top32Zero:$Rm)),
^
```
These changes allow the patterns to now be imported successfully.

Outside of CodeGenRegisters itself, we only want to find existing
SubRegIdxs, not create new ones. Change findSubRegIdx to assert and use
it consistently for this purpose.

- Change `Name`, `SubopNames`, `PrinterMethodName`, and
`EncoderMethodNames` to be stored as StringRef.
- Also changed `CheckComplexPatMatcher::Name` to StringRef as a fallout
from the above.

Verified that all the tablegen generated files within LLVM are
unchanged.