Move the creation of OperandMap from createDagOperandMapping to the loop
in addDagOperandMapping. Expand it to store the DAG operand number and
the MI operand number which will be different when there are tied
operands.

Rename createDagOperandMapping to checkDagOperandMapping to better
describe the remaining code.

I didn't lift the restriction that a source instruction can only have
one tied operand, but we should be able to if we have a use case.

There's a slight difference in the generate output. We now check that
operand 0 and 2 of QC_MVEQI are equal instead of operand 1 and 2. This
should be equivalent since operand 0 and 1 have a tied constraint.

Copy the whole struct instead of copying both fields.

We can use the MIOperandNo and NumMIOperands from the last operand
instead using a loop.

We were counting the number of tied operands in two different loops.

Tied Operands change is required for adding codegen patterns for
Qualcomm uC Xqcicm instructions
which will be done in a follow-up PR. This change leads to one of
instructions getting compressed even
when it shouldn't be. This case was not covered in #143660. Added
changes to correctly handle this case.

This update enables compress patterns to handle one tied operand in
source instructions, which was previously unsupported. Qualcomm's uC
extension Xqci includes several instructions with tied operands that can
be compressed into smaller forms. This change adds the necessary support
to enable such compression. Additionally, a compress pattern for the
qc.muliadd instruction has been implemented.

Use indent() instead of manually indenting the code in the
CompressInstEmitter.cpp. Also modify the current indentation in a few
places.

I'm looking into using sub-operands for memory operands. This would use
MIOperandInfo to create a single operand that contains a register and
immediate as sub-operands. We can treat this as a single operand for
parsing and matching in the assembler. I believe this will provide some
simplifications like removing the InstAliases we need to support "(rs1)"
without an immediate.

Doing this requires making CompressInstEmitter aware of sub-operands.

I've chosen to use a flat list of operands in the CompressPats so each
sub-operand is represented individually.