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<title>llvm-project.git/llvm/utils/TableGen/Common/CodeGenTarget.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[TableGen] Use MVT instead of MVT::SimpleValueType. NFC (#169180)</title>
<updated>2025-11-23T01:00:56+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-11-23T01:00:56+00:00</published>
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<id>0ef522ff68fff4266bf85e7b7a507a16a8fd34ee</id>
<content type='text'>
This improves type safety and is less verbose. Use SimpleTy only where
an integer is needed like switches or emitting a VBR.

---------

Co-authored-by: Sergei Barannikov &lt;barannikov88@gmail.com&gt;</content>
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<pre>
This improves type safety and is less verbose. Use SimpleTy only where
an integer is needed like switches or emitting a VBR.

---------

Co-authored-by: Sergei Barannikov &lt;barannikov88@gmail.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Silence a warning (NFC)</title>
<updated>2025-11-19T02:04:32+00:00</updated>
<author>
<name>Jie Fu</name>
<email>jiefu@tencent.com</email>
</author>
<published>2025-11-19T02:04:32+00:00</published>
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<id>a3ab11007ba277fb8a126d8199925f4ce184e195</id>
<content type='text'>
/llvm-project/llvm/utils/TableGen/Common/CodeGenTarget.cpp:286:12:
 error: variable 'SkippedInsts' set but not used [-Werror,-Wunused-but-set-variable]
  unsigned SkippedInsts = 0;
           ^
1 error generated.
</content>
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<pre>
/llvm-project/llvm/utils/TableGen/Common/CodeGenTarget.cpp:286:12:
 error: variable 'SkippedInsts' set but not used [-Werror,-Wunused-but-set-variable]
  unsigned SkippedInsts = 0;
           ^
1 error generated.
</pre>
</div>
</content>
</entry>
<entry>
<title>TableGen: Support target specialized pseudoinstructions (#159880)</title>
<updated>2025-11-19T01:22:07+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-11-19T01:22:07+00:00</published>
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<id>bfb953926c3d5021e3ac6ddbf22fd98f002da208</id>
<content type='text'>
Allow a target to steal the definition of a generic pseudoinstruction
and remap the operands. This works by defining a new instruction, which
will simply swap out the emitted entry in the InstrInfo table.

This is intended to eliminate the C++ half of the implementation
of PointerLikeRegClass. With RegClassByHwMode, the remaining usecase
for PointerLikeRegClass are the common codegen pseudoinstructions.
Every target maintains its own copy of the generic pseudo operand
definitions anyway, so we can stub out the register operands with
an appropriate class instead of waiting for runtime resolution.

In the future we could probably take this a bit further. For example,
there is a similar problem for ADJCALLSTACKUP/DOWN since they depend
on target register definitions for the stack pointer register.</content>
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<pre>
Allow a target to steal the definition of a generic pseudoinstruction
and remap the operands. This works by defining a new instruction, which
will simply swap out the emitted entry in the InstrInfo table.

This is intended to eliminate the C++ half of the implementation
of PointerLikeRegClass. With RegClassByHwMode, the remaining usecase
for PointerLikeRegClass are the common codegen pseudoinstructions.
Every target maintains its own copy of the generic pseudo operand
definitions anyway, so we can stub out the register operands with
an appropriate class instead of waiting for runtime resolution.

In the future we could probably take this a bit further. For example,
there is a similar problem for ADJCALLSTACKUP/DOWN since they depend
on target register definitions for the stack pointer register.</pre>
</div>
</content>
</entry>
<entry>
<title>Remove unused &lt;iterator&gt; inclusion</title>
<updated>2025-11-11T12:33:38+00:00</updated>
<author>
<name>serge-sans-paille</name>
<email>sguelton@mozilla.com</email>
</author>
<published>2025-11-10T15:06:25+00:00</published>
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<id>af146462f9ce059fbc025467f4f8ae41e0051bc9</id>
<content type='text'>
Per https://llvm.org/docs/CodingStandards.html#include-as-little-as-possible
this improves compilation time, while not being too intrusive on the
codebase.
</content>
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<pre>
Per https://llvm.org/docs/CodingStandards.html#include-as-little-as-possible
this improves compilation time, while not being too intrusive on the
codebase.
</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Use "= default" (NFC) (#165968)</title>
<updated>2025-11-01T16:25:04+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-11-01T16:25:04+00:00</published>
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<id>83195d9541a27aca2a86c2b73694e0deee7f1d7e</id>
<content type='text'>
Identified with modernize-use-equals-default.</content>
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<pre>
Identified with modernize-use-equals-default.</pre>
</div>
</content>
</entry>
<entry>
<title>CodeGen: Add RegisterClass by HwMode (#158269)</title>
<updated>2025-09-19T11:08:51+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-09-19T11:08:51+00:00</published>
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<id>6b54c92be02079eff4f4edfbe667e60c3a1949df</id>
<content type='text'>
This is a generalization of the LookupPtrRegClass mechanism.
AMDGPU has several use cases for swapping the register class of
instruction operands based on the subtarget, but none of them
really fit into the box of being pointer-like.

The current system requires manual management of an arbitrary integer
ID. For the AMDGPU use case, this would end up being around 40 new
entries to manage.

This just introduces the base infrastructure. I have ports of all
the target specific usage of PointerLikeRegClass ready.</content>
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<pre>
This is a generalization of the LookupPtrRegClass mechanism.
AMDGPU has several use cases for swapping the register class of
instruction operands based on the subtarget, but none of them
really fit into the box of being pointer-like.

The current system requires manual management of an arbitrary integer
ID. For the AMDGPU use case, this would end up being around 40 new
entries to manage.

This just introduces the base infrastructure. I have ports of all
the target specific usage of PointerLikeRegClass ready.</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Avoid field lookup in a performance critical place (NFC) (#154871)</title>
<updated>2025-08-25T15:47:48+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2025-08-25T15:47:48+00:00</published>
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<id>7dbdb66a5d2ee1496a2660ddc5a068a821842871</id>
<content type='text'>
`Target.getInstructions()` is called by virtually all TableGen backends.
It is slow, and one of the two factors is the use of an expensive
predicate in `llvm::sort`. This change speeds up sorting by 10x.</content>
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<pre>
`Target.getInstructions()` is called by virtually all TableGen backends.
It is slow, and one of the two factors is the use of an expensive
predicate in `llvm::sort`. This change speeds up sorting by 10x.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][TableGen] Rename `CodeGenTarget` instruction accessors (#146767)</title>
<updated>2025-07-07T15:01:14+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-07-07T15:01:14+00:00</published>
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<id>5f2e88a1254ee392c24a1963e08d76e771ba7aea</id>
<content type='text'>
Rename `getXYZInstructionsByEnumValue()` to just `getXYZInstructions`
and drop the `ByEnumValue` in the name.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Rename `getXYZInstructionsByEnumValue()` to just `getXYZInstructions`
and drop the `ByEnumValue` in the name.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][TableGen] Add accessors for various instruction subclasses (#146615)</title>
<updated>2025-07-02T19:49:27+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-07-02T19:49:27+00:00</published>
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<id>a880c8e670befc20dfb6e0789e8dfb93aa06173c</id>
<content type='text'>
- Add various instruction subclass/sub-slice accessors to
`CodeGenTarget`.
- Delete unused `inst_begin` and `inst_end` iterators.
- Rename `Instructions` to `InstructionMap` and `getInstructions` to
`getInstructionMap` to better represent their meaning.
- Use these new accessors in InstrInfoEmitter</content>
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<pre>
- Add various instruction subclass/sub-slice accessors to
`CodeGenTarget`.
- Delete unused `inst_begin` and `inst_end` iterators.
- Rename `Instructions` to `InstructionMap` and `getInstructions` to
`getInstructionMap` to better represent their meaning.
- Use these new accessors in InstrInfoEmitter</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Move getSuperRegForSubReg into CodeGenRegBank. NFC. (#142979)</title>
<updated>2025-06-09T11:03:29+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-06-09T11:03:29+00:00</published>
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<id>592e59667a04cf9a35a9b040772e08cb67902463</id>
<content type='text'>
This method doesn't use anything from CodeGenTarget, so it seems to
belong in CodeGenRegBank.</content>
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<pre>
This method doesn't use anything from CodeGenTarget, so it seems to
belong in CodeGenRegBank.</pre>
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</content>
</entry>
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