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<title>llvm-project.git/llvm/utils/TableGen/Common/CodeGenRegisters.h, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[TableGen] Use default member initializers. NFC. (#144349)</title>
<updated>2025-06-16T14:26:47+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-06-16T14:26:47+00:00</published>
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<id>39ad3151e073e9f721d1e2e2849fb4bdc9443ae3</id>
<content type='text'>
Automated with clang-tidy -fix -checks=-*,modernize-use-default-member-init</content>
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<pre>
Automated with clang-tidy -fix -checks=-*,modernize-use-default-member-init</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Move getSuperRegForSubReg into CodeGenRegBank. NFC. (#142979)</title>
<updated>2025-06-09T11:03:29+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-06-09T11:03:29+00:00</published>
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<id>592e59667a04cf9a35a9b040772e08cb67902463</id>
<content type='text'>
This method doesn't use anything from CodeGenTarget, so it seems to
belong in CodeGenRegBank.</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This method doesn't use anything from CodeGenTarget, so it seems to
belong in CodeGenRegBank.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][TableGen] Code cleanup in CodeGenRegister (#137994)</title>
<updated>2025-05-05T21:05:59+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-05-05T21:05:59+00:00</published>
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<id>9281947a7dd8ae40c70548989cb0bbbf27e6cd10</id>
<content type='text'>
- Use range for loops.
- Wrap complex LLVM_DEBUG() macros in {} to have clang-format format the
contents similar to regular code.
- Extract repeated code snippets for debug dumping into helper lambda.
- Add `BitsInit::getBits()` to get all contained bits.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Use range for loops.
- Wrap complex LLVM_DEBUG() macros in {} to have clang-format format the
contents similar to regular code.
- Extract repeated code snippets for debug dumping into helper lambda.
- Add `BitsInit::getBits()` to get all contained bits.</pre>
</div>
</content>
</entry>
<entry>
<title>TableGen: Optimize super-register class computation (#134865)</title>
<updated>2025-04-10T19:00:08+00:00</updated>
<author>
<name>Nicolai Hähnle</name>
<email>nicolai.haehnle@amd.com</email>
</author>
<published>2025-04-10T19:00:08+00:00</published>
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<id>9c31155ead6e68450b8c2de38f5bec8f5c5db810</id>
<content type='text'>
Inferring super-register classes naively requires checking every
register class against every other register class and sub-register
index.
Each of those checks is itself a non-trivial operation on register sets.

Culling as many (RC, RC, SubIdx) triples as possible is important for
the running time of TableGen for architectures with complex sub-register
relations.

Use transitivity to cull many (RC, RC, SubIdx) triples. This
unfortunately requires us to complete the transitive closure of
super-register classes explicitly, but it still cuts down the running
time on AMDGPU substantially -- in some upcoming work in the
backend by more than half (in very rough measurements).

This changes the names of some of the inferred register classes, since
the order in which they are inferred changes. The names of the inferred
register classes become shorter, which reduces the size of the generated
files.

Replacing some uses of SmallPtrSet by DenseSet shaves off a few more
percent; there are hundreds of register classes in AMDGPU.

Tweaking the topological signature check to skip reigsters without
super-registers further helps skip register classes that have "pseudo"
registers in them whose sub- and super-register structure is trivial.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Inferring super-register classes naively requires checking every
register class against every other register class and sub-register
index.
Each of those checks is itself a non-trivial operation on register sets.

Culling as many (RC, RC, SubIdx) triples as possible is important for
the running time of TableGen for architectures with complex sub-register
relations.

Use transitivity to cull many (RC, RC, SubIdx) triples. This
unfortunately requires us to complete the transitive closure of
super-register classes explicitly, but it still cuts down the running
time on AMDGPU substantially -- in some upcoming work in the
backend by more than half (in very rough measurements).

This changes the names of some of the inferred register classes, since
the order in which they are inferred changes. The names of the inferred
register classes become shorter, which reduces the size of the generated
files.

Replacing some uses of SmallPtrSet by DenseSet shaves off a few more
percent; there are hundreds of register classes in AMDGPU.

Tweaking the topological signature check to skip reigsters without
super-registers further helps skip register classes that have "pseudo"
registers in them whose sub- and super-register structure is trivial.</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Use std::pair instead of std::make_pair. NFC. (#123174)</title>
<updated>2025-01-16T13:20:41+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-01-16T13:20:41+00:00</published>
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<id>4e8c9d28132039a98feb97cec2759cddeb37d934</id>
<content type='text'>
Also use brace initialization and emplace to avoid explicitly 
constructing std::pair, and the same for std::tuple.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Also use brace initialization and emplace to avoid explicitly 
constructing std::pair, and the same for std::tuple.</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Change CodeGenRegister to use const Record pointer (#108027)</title>
<updated>2024-09-11T15:53:47+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2024-09-11T15:53:47+00:00</published>
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<id>7c6592f5a368e17c2b15469042c33a4e1cb7a0ff</id>
<content type='text'>
Change CodeGenRegister to use const Record pointer.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Change CodeGenRegister to use const Record pointer.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (#107858)</title>
<updated>2024-09-09T21:33:21+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2024-09-09T21:33:21+00:00</published>
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<id>bdf02249e7f8f95177ff58c881caf219699acb98</id>
<content type='text'>
Change CGIOperandList::OperandInfo::Rec and CGIOperandList::TheDef to
const pointer.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Change CGIOperandList::OperandInfo::Rec and CGIOperandList::TheDef to
const pointer.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Change SetTheory set/vec to use const Record * (#107692)</title>
<updated>2024-09-09T15:47:42+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2024-09-09T15:47:42+00:00</published>
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<id>1651014960b90bd1398f61bec0866d4a187910ef</id>
<content type='text'>
Change SetTheory::RecSet/RecVec to use const Record pointers.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Change SetTheory::RecSet/RecVec to use const Record pointers.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC] Fix TableGen include guards to match paths (#102746)</title>
<updated>2024-08-10T14:35:03+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2024-08-10T14:35:03+00:00</published>
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<id>8a61bfcf8f3e569d7f1d8fcb8958c02ec4aa6e7f</id>
<content type='text'>
- Fix include guards for headers under utils/TableGen to match their
paths.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Fix include guards for headers under utils/TableGen to match their
paths.</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Use std::move. NFC</title>
<updated>2024-08-02T04:42:44+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2024-08-02T04:42:38+00:00</published>
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<id>358593ba87a18a8e85dafc0683c5e7af94009135</id>
<content type='text'>
Fixes #101408.
</content>
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<pre>
Fixes #101408.
</pre>
</div>
</content>
</entry>
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