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<title>llvm-project.git/llvm/utils/TableGen/CodeGenTarget.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[RFC][TableGen] Restructure TableGen Source (#80847)</title>
<updated>2024-03-25T08:40:35+00:00</updated>
<author>
<name>Pierre van Houtryve</name>
<email>pierre.vanhoutryve@amd.com</email>
</author>
<published>2024-03-25T08:40:35+00:00</published>
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<id>fa3d789df15bd1f58fb8ba4ea3be909218cf7f03</id>
<content type='text'>
Refactor of the llvm-tblgen source into:
- a "Basic" library, which contains the bare minimum utilities to build
`llvm-min-tablegen`
- a "Common" library which contains all of the helpers for TableGen
backends. Such helpers can be shared by more than one backend, and even
unit tested (e.g. CodeExpander is, maybe we can add more over time)

Fixes #80647</content>
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<pre>
Refactor of the llvm-tblgen source into:
- a "Basic" library, which contains the bare minimum utilities to build
`llvm-min-tablegen`
- a "Common" library which contains all of the helpers for TableGen
backends. Such helpers can be shared by more than one backend, and even
unit tested (e.g. CodeExpander is, maybe we can add more over time)

Fixes #80647</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] More efficiency improvements for encode/decode emission. (#84647)</title>
<updated>2024-03-11T13:13:33+00:00</updated>
<author>
<name>Jason Eckhardt</name>
<email>jeckhardt@nvidia.com</email>
</author>
<published>2024-03-11T13:13:33+00:00</published>
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<id>6f7e940c2d6711c7be8bc5365a1f4da3a328b2eb</id>
<content type='text'>
DecoderEmitter and CodeEmitterGen perform repeated linear walks over the
entire instruction list. This patch eliminates two more such walks.

The eliminated traversals visit every instruction merely to determine
whether the target has variable length encodings. For a target with
variable length encodings, the original any_of will terminate quickly.
But all targets other than M68k use fixed length encodings and thus
any_of must visit the entire instruction list.</content>
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<pre>
DecoderEmitter and CodeEmitterGen perform repeated linear walks over the
entire instruction list. This patch eliminates two more such walks.

The eliminated traversals visit every instruction merely to determine
whether the target has variable length encodings. For a target with
variable length encodings, the original any_of will terminate quickly.
But all targets other than M68k use fixed length encodings and thus
any_of must visit the entire instruction list.</pre>
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</content>
</entry>
<entry>
<title>[TableGen][CodeGenTarget] Add support for v3i8 and v3i1 MVTs. [NFCI] (#83140)</title>
<updated>2024-02-29T16:35:34+00:00</updated>
<author>
<name>Francesco Petrogalli</name>
<email>francesco.petrogalli@apple.com</email>
</author>
<published>2024-02-29T16:35:34+00:00</published>
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<id>9491aecd235da9674150fe56bd0f29c3a22472c4</id>
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<pre>
</pre>
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</entry>
<entry>
<title>[TableGen] Stop using make_pair and make_tuple. NFC. (#81730)</title>
<updated>2024-02-14T13:16:20+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2024-02-14T13:16:20+00:00</published>
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<id>f723260a80baee08394093fa06777dcc55b3ee4a</id>
<content type='text'>
These are unnecessary since C++17.</content>
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<pre>
These are unnecessary since C++17.</pre>
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</content>
</entry>
<entry>
<title>[NFC] clang-format utils/TableGen (#80973)</title>
<updated>2024-02-09T08:27:04+00:00</updated>
<author>
<name>Pierre van Houtryve</name>
<email>pierre.vanhoutryve@amd.com</email>
</author>
<published>2024-02-09T08:27:04+00:00</published>
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<id>b9079baaddfed5e604fbfaa1d81a7a1c38e78c26</id>
<content type='text'>
```
find llvm/utils/TableGen -iname "*.h" -o -iname "*.cpp" | xargs clang-format-16 -i
```

Split from #80847</content>
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<pre>
```
find llvm/utils/TableGen -iname "*.h" -o -iname "*.cpp" | xargs clang-format-16 -i
```

Split from #80847</pre>
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</content>
</entry>
<entry>
<title>[TableGen] Remove map CodeGenTarget::InstrToIntMap. (#81079)</title>
<updated>2024-02-08T03:33:16+00:00</updated>
<author>
<name>Jason Eckhardt</name>
<email>jeckhardt@nvidia.com</email>
</author>
<published>2024-02-08T03:33:16+00:00</published>
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<id>d01864eb2f21d56cf432da7d80c505f510533c46</id>
<content type='text'>
This patch removes CodeGenTarget::InstrToIntMap, using instead a new
member CodeGenInstruction::EnumVal to store each enum value. This value
is computed and set by CodeGenTarget::computeInstrsByEnum and queried by
CodeGenTarget::getInstrIntValue.</content>
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<pre>
This patch removes CodeGenTarget::InstrToIntMap, using instead a new
member CodeGenInstruction::EnumVal to store each enum value. This value
is computed and set by CodeGenTarget::computeInstrsByEnum and queried by
CodeGenTarget::getInstrIntValue.</pre>
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</content>
</entry>
<entry>
<title>[TableGen] Extend direct lookup to instruction values in generic tables. (#80486)</title>
<updated>2024-02-07T04:49:39+00:00</updated>
<author>
<name>Jason Eckhardt</name>
<email>jeckhardt@nvidia.com</email>
</author>
<published>2024-02-07T04:49:39+00:00</published>
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<id>8ae048507086cc3a2ceb6974506d3048c516a726</id>
<content type='text'>
Currently, for some tables involving a single primary key field which is
integral and densely numbered, a direct lookup is generated rather than
a binary search. This patch extends the direct lookup function
generation to instructions, where the integral value corresponds to the
instruction's enum value.

While this isn't as common as for other tables, it does occur in at
least one downstream backend and one in-tree backend.

Added a unit test and minimally updated the documentation.</content>
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<pre>
Currently, for some tables involving a single primary key field which is
integral and densely numbered, a direct lookup is generated rather than
a binary search. This patch extends the direct lookup function
generation to instructions, where the integral value corresponds to the
instruction's enum value.

While this isn't as common as for other tables, it does occur in at
least one downstream backend and one in-tree backend.

Added a unit test and minimally updated the documentation.</pre>
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</content>
</entry>
<entry>
<title>[TableGen] Integrate TableGen-based macro fusion (#73115)</title>
<updated>2024-01-19T10:08:09+00:00</updated>
<author>
<name>Wang Pengcheng</name>
<email>wangpengcheng.pp@bytedance.com</email>
</author>
<published>2024-01-19T10:08:09+00:00</published>
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<id>3d90e1fa94d17c3b27c89731760f28791bb30943</id>
<content type='text'>
`Fusion` is inherited from `SubtargetFeature` now. Each definition
of `Fusion` will define a `SubtargetFeature` accordingly.

Method `getMacroFusions` is added to `TargetSubtargetInfo`, which
returns a list of `MacroFusionPredTy` that will be evaluated by
MacroFusionMution.

`getMacroFusions` will be auto-generated if the target has `Fusion`
definitions.
</content>
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<pre>
`Fusion` is inherited from `SubtargetFeature` now. Each definition
of `Fusion` will define a `SubtargetFeature` accordingly.

Method `getMacroFusions` is added to `TargetSubtargetInfo`, which
returns a list of `MacroFusionPredTy` that will be evaluated by
MacroFusionMution.

`getMacroFusions` will be auto-generated if the target has `Fusion`
definitions.
</pre>
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</content>
</entry>
<entry>
<title>[RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners</title>
<updated>2023-08-11T06:54:56+00:00</updated>
<author>
<name>pvanhout</name>
<email>pierre.vanhoutryve@amd.com</email>
</author>
<published>2023-07-25T11:45:18+00:00</published>
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<id>63afb70503bf254bb3cdd8acc6bd1ad25c66e0d8</id>
<content type='text'>
See https://discourse.llvm.org/t/rfc-overhauled-mir-patterns-for-globalisel-combiners/72264

This is a complete overrhaul of the recently-added GlobalISel Match Table backend which adds
support for MIR patterns for both match and apply patterns.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D156315
</content>
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<pre>
See https://discourse.llvm.org/t/rfc-overhauled-mir-patterns-for-globalisel-combiners/72264

This is a complete overrhaul of the recently-added GlobalISel Match Table backend which adds
support for MIR patterns for both match and apply patterns.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D156315
</pre>
</div>
</content>
</entry>
<entry>
<title>[TableGen] Forward declare CodeGenRegister et al. (NFC)</title>
<updated>2023-04-30T04:01:00+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2023-04-30T04:00:20+00:00</published>
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