llvm-project.git/llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll, branch users/nico/python-2

[LV] Compute register usage for interleaving on VPlan. (#126437)

2025-04-08T19:52:50+00:00

Add a version of calculateRegisterUsage that works estimates register
usage for a VPlan. This mostly just ports the existing code, with some
updates to figure out what recipes will generate vectors vs scalars.

There are number of changes in the computed register usages, but they
should be more accurate w.r.t. to the generated vector code.

There are the following changes:

 * Scalar usage increases in most cases by 1, as we always create a
   scalar canonical IV, which is alive across the loop and is not
   considered by the legacy implementation

 * Output is ordered by insertion, now scalar registers are added first
   due the canonical IV phi.

 * Using the VPlan, we now also more precisely know if an induction will
   be vectorized or scalarized.

Depends on https://github.com/llvm/llvm-project/pull/126415

PR: https://github.com/llvm/llvm-project/pull/126437

[VPlan] Generalize SCALAR-STEPS removal to any unroll factor.

2025-03-26T21:03:50+00:00

Follow-up to dfca6c0d3bf9d1a056 to extend isUnrolled handle any unrolled
VPlan, which means there's a single UF, but it will be > 1 if unrolling
took place.

[VPlan] Remove no-op SCALAR-STEPS after unrolling. (#123655)

2025-03-25T12:57:24+00:00

After unrolling, there may be additional simplifications that can be
applied. One example is removing SCALAR-STEPS for the first part where
only the first lane is demanded.

This removes redundant adds of 0 from a large number of tests (~200),
many which I am still working on updating.

In preparation for removing redundant WideIV steps added in
https://github.com/llvm/llvm-project/pull/119284.

PR: https://github.com/llvm/llvm-project/pull/123655

[LV] Regen a couple of tests with UTC (#127785)

2025-02-20T15:27:51+00:00

[LV] Change loops' interleave count computation (#73766)

2024-01-04T07:15:22+00:00

[LV] Change loops' interleave count computation

A set of microbenchmarks in llvm-test-suite (https://github.com/llvm/llvm-test-suite/pull/56), when tested on a AArch64 platform, demonstrates that loop interleaving is beneficial when the vector loop runs at least twice or when the epilogue loop trip count (TC) is minimal. Therefore, we choose interleaving count (IC) between TC/VF & TC/2*VF (VF = vectorization factor), such that remainder TC for the epilogue loop is minimum while the IC is maximum in case the remainder TC is same for both.

The initial tests for this change were submitted in PRs:
https://github.com/llvm/llvm-project/pull/70272 and https://github.com/llvm/llvm-project/pull/74689.

[LoopVectorize] Convert some tests to opaque pointers (NFC)

2022-12-14T14:16:59+00:00

[NFC] Port all runlines for LoopVectorize pass tests to -passes syntax

2022-12-05T19:17:30+00:00

Revert "Temporarily Revert "Add basic loop fusion pass.""

2019-04-17T04:52:47+00:00

The reversion apparently deleted the test/Transforms directory.

Will be re-reverting again.

llvm-svn: 358552

Temporarily Revert "Add basic loop fusion pass."

2019-04-17T02:12:23+00:00

As it's causing some bot failures (and per request from kbarton).

This reverts commit r358543/ab70da07286e618016e78247e4a24fcb84077fda.

llvm-svn: 358546

Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.

2016-02-26T19:40:34+00:00

FileCheck actually doesn't support combo suffixes.

Differential Revision: http://reviews.llvm.org/D17588

llvm-svn: 262054