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<title>llvm-project.git/llvm/test/CodeGen, branch users/fmayer/spr/wip-smartpointers</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[DirectX] Fix crash when naming buffers of arrays (#164553)</title>
<updated>2025-10-22T17:35:16+00:00</updated>
<author>
<name>Justin Bogner</name>
<email>mail@justinbogner.com</email>
</author>
<published>2025-10-22T17:35:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e9c7966046803a43b711d2b309e189ea8a3e0e85'/>
<id>e9c7966046803a43b711d2b309e189ea8a3e0e85</id>
<content type='text'>
DXILResource was falling over trying to name a resource type that
contained an array, such as `StructuredBuffer&lt;float[3][2]&gt;`. Handle this
by walking through array types to gather the dimensions.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
DXILResource was falling over trying to name a resource type that
contained an array, such as `StructuredBuffer&lt;float[3][2]&gt;`. Handle this
by walking through array types to gather the dimensions.</pre>
</div>
</content>
</entry>
<entry>
<title>[SPIRV][HLSL] Fix assert with cbuffers through constexpr (#164555)</title>
<updated>2025-10-22T17:32:34+00:00</updated>
<author>
<name>Justin Bogner</name>
<email>mail@justinbogner.com</email>
</author>
<published>2025-10-22T17:32:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=0e807a4261913f73ce68052cb2707b4e7ae89e7b'/>
<id>0e807a4261913f73ce68052cb2707b4e7ae89e7b</id>
<content type='text'>
The comment here pointed out that RAUW would fall over given a
constantexpr, but then proceeded to just do what RAUW does by hand,
which falls over in the same way. Instead, convert constantexprs
involving cbuffer globals to instructions before processing them.

The test update just modifies the existing cbuffer test, since it
implied it was trying to test this exact case anyways.</content>
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<pre>
The comment here pointed out that RAUW would fall over given a
constantexpr, but then proceeded to just do what RAUW does by hand,
which falls over in the same way. Instead, convert constantexprs
involving cbuffer globals to instructions before processing them.

The test update just modifies the existing cbuffer test, since it
implied it was trying to test this exact case anyways.</pre>
</div>
</content>
</entry>
<entry>
<title>[BPF] Do not emit names for PTR, CONST, VOLATILE and RESTRICT BTF types (#163174)</title>
<updated>2025-10-22T14:30:33+00:00</updated>
<author>
<name>Michal R</name>
<email>vad.sol@proton.me</email>
</author>
<published>2025-10-22T14:30:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7ae7a5ad51f32118161ee0aaa13b11368aa5d29b'/>
<id>7ae7a5ad51f32118161ee0aaa13b11368aa5d29b</id>
<content type='text'>
We currently raise a warning in `print_btf.py` when any of these types
have a name. Linux kernel doesn't allow names in these types either.[0]

However, there is nothing stopping frontends from giving names to these
types. To make sure that they are always anonymous, explicitly skip the
name emission.

[0]
https://elixir.bootlin.com/linux/v6.17.1/source/kernel/bpf/btf.c#L2586</content>
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<pre>
We currently raise a warning in `print_btf.py` when any of these types
have a name. Linux kernel doesn't allow names in these types either.[0]

However, there is nothing stopping frontends from giving names to these
types. To make sure that they are always anonymous, explicitly skip the
name emission.

[0]
https://elixir.bootlin.com/linux/v6.17.1/source/kernel/bpf/btf.c#L2586</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Reland "Remove redundant s_cmp_lg_* sX, 0" (#164201)</title>
<updated>2025-10-22T13:42:29+00:00</updated>
<author>
<name>LU-JOHN</name>
<email>John.Lu@amd.com</email>
</author>
<published>2025-10-22T13:42:29+00:00</published>
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<id>9abbec66bfa34922521ef88fad1d6fcd43c1c462</id>
<content type='text'>
Reland PR https://github.com/llvm/llvm-project/pull/162352. Fix by
excluding SI_PC_ADD_REL_OFFSET from instructions that set SCC = DST!=0.
Passes check-libc-amdgcn-amd-amdhsa now.

Distribution of instructions that allowed a redundant S_CMP to be
deleted in check-libc-amdgcn-amd-amdhsa test:

```
S_AND_B32      485
S_AND_B64      47
S_ANDN2_B32    42
S_ANDN2_B64    277492
S_CSELECT_B64  17631
S_LSHL_B32     6
S_OR_B64       11
```

---------

Signed-off-by: John Lu &lt;John.Lu@amd.com&gt;
Co-authored-by: Matt Arsenault &lt;arsenm2@gmail.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reland PR https://github.com/llvm/llvm-project/pull/162352. Fix by
excluding SI_PC_ADD_REL_OFFSET from instructions that set SCC = DST!=0.
Passes check-libc-amdgcn-amd-amdhsa now.

Distribution of instructions that allowed a redundant S_CMP to be
deleted in check-libc-amdgcn-amd-amdhsa test:

```
S_AND_B32      485
S_AND_B64      47
S_ANDN2_B32    42
S_ANDN2_B64    277492
S_CSELECT_B64  17631
S_LSHL_B32     6
S_OR_B64       11
```

---------

Signed-off-by: John Lu &lt;John.Lu@amd.com&gt;
Co-authored-by: Matt Arsenault &lt;arsenm2@gmail.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)</title>
<updated>2025-10-22T12:14:21+00:00</updated>
<author>
<name>paperchalice</name>
<email>liujunchang97@outlook.com</email>
</author>
<published>2025-10-22T12:14:21+00:00</published>
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<id>becf84790126ce83ba36eaddc06a0a0a46005048</id>
<content type='text'>
Post cleanup for #164534</content>
<content type='xhtml'>
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<pre>
Post cleanup for #164534</pre>
</div>
</content>
</entry>
<entry>
<title>[LLVM][CodeGen][AArch64] Fix global-isel for LD1R. (#164418)</title>
<updated>2025-10-22T11:22:49+00:00</updated>
<author>
<name>Paul Walker</name>
<email>paul.walker@arm.com</email>
</author>
<published>2025-10-22T11:22:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a4dbd111c285012d744fa0f86e710e4b3032d826'/>
<id>a4dbd111c285012d744fa0f86e710e4b3032d826</id>
<content type='text'>
LD1Rv8b only supports a base register but the DAG is matched using
am_indexed8 with the offset it finds silently dropped.

I've also fixed a couple of immediate operands types inconsistencies
that don't manifest as bugs because their incorrect scaling is overriden
by the complex pattern and MachineInstr that are correct and thus
there's nothing to test.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
LD1Rv8b only supports a base register but the DAG is matched using
am_indexed8 with the offset it finds silently dropped.

I've also fixed a couple of immediate operands types inconsistencies
that don't manifest as bugs because their incorrect scaling is overriden
by the complex pattern and MachineInstr that are correct and thus
there's nothing to test.</pre>
</div>
</content>
</entry>
<entry>
<title>[ShrinkWrap] Consider constant pool access as non-stack access (#164393)</title>
<updated>2025-10-22T11:05:57+00:00</updated>
<author>
<name>Sushant Gokhale</name>
<email>sgokhale@nvidia.com</email>
</author>
<published>2025-10-22T11:05:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=10d3c6bc11ca919563036aa590440c38502bcd2f'/>
<id>10d3c6bc11ca919563036aa590440c38502bcd2f</id>
<content type='text'>
As far as I understand, constant pool access does not access stack and
accesses read-only memory.

This patch considers constant pool access as non-stack access allowing
shrink wrapping to happen in the concerned test.

We should be seeing perf improvement with povray benchmark from
SPEC17(around 12% with -flto -Ofast) after this patch.


An NFC PR #162476 already exists to upload the test before the patch but
approval has got delayed. So, as @davemgreen suggested in that PR, I
have uploaded the test and patch in this single PR to show how test
looks like.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As far as I understand, constant pool access does not access stack and
accesses read-only memory.

This patch considers constant pool access as non-stack access allowing
shrink wrapping to happen in the concerned test.

We should be seeing perf improvement with povray benchmark from
SPEC17(around 12% with -flto -Ofast) after this patch.


An NFC PR #162476 already exists to upload the test before the patch but
approval has got delayed. So, as @davemgreen suggested in that PR, I
have uploaded the test and patch in this single PR to show how test
looks like.</pre>
</div>
</content>
</entry>
<entry>
<title>[ShrinkWrap][NFC] Test with load from constant pool preventing shrink (#162476)</title>
<updated>2025-10-22T11:02:28+00:00</updated>
<author>
<name>Sushant Gokhale</name>
<email>sgokhale@nvidia.com</email>
</author>
<published>2025-10-22T11:02:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=cde445716907ccf1003f2d7a95c1a672178d6e8e'/>
<id>cde445716907ccf1003f2d7a95c1a672178d6e8e</id>
<content type='text'>
wrapping

Shrink wrapping treats a load from constant pool as a stack access. This
is not correct. Constants are basically stored in read only section
AFAIU. This prevents shrink wrapping from kicking in.

(Related to PR #160257. PR #160257 will be closed.)</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
wrapping

Shrink wrapping treats a load from constant pool as a stack access. This
is not correct. Constants are basically stored in read only section
AFAIU. This prevents shrink wrapping from kicking in.

(Related to PR #160257. PR #160257 will be closed.)</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][WebAssembly] FP conversion interleave tests (#164576)</title>
<updated>2025-10-22T10:43:44+00:00</updated>
<author>
<name>Sam Parker</name>
<email>sam.parker@arm.com</email>
</author>
<published>2025-10-22T10:43:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=20340accf235579d64faf322abc428bc5ddd7f91'/>
<id>20340accf235579d64faf322abc428bc5ddd7f91</id>
<content type='text'>
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] [Codegen] Add pattern for relaxed min max from fminimum/fmaximum over v4f32 and v2f64 (#162948)</title>
<updated>2025-10-22T10:08:24+00:00</updated>
<author>
<name>Jasmine Tang</name>
<email>jjasmine@igalia.com</email>
</author>
<published>2025-10-22T10:08:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1fbfac30f107cbf63f91101fa5b34dee397089af'/>
<id>1fbfac30f107cbf63f91101fa5b34dee397089af</id>
<content type='text'>
Related to #55932</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Related to #55932</pre>
</div>
</content>
</entry>
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