llvm-project.git/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll, branch users/nico/python-2 Unnamed repository; edit this file 'description' to name the repository. [WebAssembly] Remove datalayout strings from llc tests 2021-07-14T18:17:08+00:00 Thomas Lively tlively@google.com 2021-07-14T18:17:08+00:00 122b0220fd45ee71acda912b0b712bb8edb6ba46 The data layout strings do not have any effect on llc tests and will become misleadingly out of date as we continue to update the canonical data layout, so remove them from the tests. Differential Revision: https://reviews.llvm.org/D105842 
The data layout strings do not have any effect on llc tests and will become
misleadingly out of date as we continue to update the canonical data layout, so
remove them from the tests.

Differential Revision: https://reviews.llvm.org/D105842
[WebAssembly] Implement i64x2 comparisons 2021-03-31T17:46:17+00:00 Thomas Lively tlively@google.com 2021-03-31T17:46:17+00:00 45783d0e8a3632b7c1f5b0cdd258bfba1f8583e7 Removes the prototype builtin and intrinsic for i64x2.eq and implements that instruction as well as the other i64x2 comparison instructions in the final SIMD spec. Unsigned comparisons were not included in the final spec, so they still need to be scalarized via a custom lowering. Differential Revision: https://reviews.llvm.org/D99623 
Removes the prototype builtin and intrinsic for i64x2.eq and implements that
instruction as well as the other i64x2 comparison instructions in the final SIMD
spec. Unsigned comparisons were not included in the final spec, so they still
need to be scalarized via a custom lowering.

Differential Revision: https://reviews.llvm.org/D99623
[WebAssembly] Remove unimplemented-simd target feature 2021-03-18T17:23:12+00:00 Thomas Lively tlively@google.com 2021-03-18T17:23:12+00:00 8638c897f469dbd1d95b2e46b39ab72fb7b9d336 Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature for gating SIMD instructions that engines have not implemented. With this change, v128.const is now enabled by default with the simd128 target feature. Differential Revision: https://reviews.llvm.org/D98457 
Now that the WebAssembly SIMD specification is finalized and engines are
generally up-to-date, there is no need for a separate target feature for gating
SIMD instructions that engines have not implemented. With this change,
v128.const is now enabled by default with the simd128 target feature.

Differential Revision: https://reviews.llvm.org/D98457
[LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve expansion of SETONE/SETUEQ on targets without SETO/SETUO. 2021-01-12T18:45:03+00:00 Craig Topper craig.topper@sifive.com 2021-01-12T17:52:00+00:00 03c8d6a0c4bd0016bdfd1e53e6878696fe6412ed If SETO/SETUO aren't legal, they'll be expanded and we'll end up with 3 comparisons. SETONE is equivalent to (SETOGT || SETOLT) so if one of those operations is supported use that expansion. We don't need both since we can commute the operands to make the other. SETUEQ can be implemented with !(SETOGT || SETOLT) or (SETULE && SETUGE). I've only implemented the first because it didn't look like most of the affected targets had legal SETULE/SETUGE. Reviewed By: frasercrmck, tlively, nemanjai Differential Revision: https://reviews.llvm.org/D94450 
If SETO/SETUO aren't legal, they'll be expanded and we'll end up
with 3 comparisons.

SETONE is equivalent to (SETOGT || SETOLT)
so if one of those operations is supported use that expansion. We
don't need both since we can commute the operands to make the other.

SETUEQ can be implemented with !(SETOGT || SETOLT) or (SETULE && SETUGE).
I've only implemented the first because it didn't look like most of the
affected targets had legal SETULE/SETUGE.

Reviewed By: frasercrmck, tlively, nemanjai

Differential Revision: https://reviews.llvm.org/D94450
[WebAssembly] Remove unused FileCheck test prefixes 2020-10-29T20:37:55+00:00 Thomas Lively tlively@google.com 2020-10-29T20:37:55+00:00 6214be3a4ab9ee89c837e2054923d0020060170e This commit removes unused FileCheck prefixes from WebAssembly test files to avoid causing test failures once FileCheck disallows unused prefixes by default. See D90281 and the corresponding llvm-dev thread for context. Reviewed By: aardappel Differential Revision: https://reviews.llvm.org/D90416 
This commit removes unused FileCheck prefixes from WebAssembly test files to
avoid causing test failures once FileCheck disallows unused prefixes by default.
See D90281 and the corresponding llvm-dev thread for context.

Reviewed By: aardappel

Differential Revision: https://reviews.llvm.org/D90416
[WebAssembly] Enable recently implemented SIMD operations 2020-02-05T02:36:32+00:00 Thomas Lively tlively@google.com 2020-01-31T02:23:14+00:00 27748363da8df9bd952cc0ba5b9c57f51414a07c Summary: Moves a batch of instructions from unimplemented-simd128 to simd128 because they have recently become available in V8. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D73926 
Summary:
Moves a batch of instructions from unimplemented-simd128 to simd128
because they have recently become available in V8.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73926
Reland "[WebAssembly] Expand setcc of v2i64" 2019-11-01T17:34:01+00:00 Thomas Lively tlively@google.com 2019-11-01T17:21:00+00:00 ecb7daf68f20baa5af72d7c4247ea4c2f5b788bf This reverts commit e5cae5692b5899631b5bfe5c23234deb5efda10c, which reverted 11850a6305c5778b180243eb06aefe86762dd4ce. The original revert was done because of breakage that was actually in a separate commit, 2ab1b8c1ec452fb743f6cc5051e75a01039cabfe, which was also reverted and has since been fixed and relanded. 
This reverts commit e5cae5692b5899631b5bfe5c23234deb5efda10c, which
reverted 11850a6305c5778b180243eb06aefe86762dd4ce. The original revert
was done because of breakage that was actually in a separate commit,
2ab1b8c1ec452fb743f6cc5051e75a01039cabfe, which was also reverted and
has since been fixed and relanded.
Revert "[WebAssembly] Expand setcc of v2i64" 2019-10-31T23:44:09+00:00 Vlad Tsyrklevich vtsyrklevich@google.com 2019-10-31T23:32:38+00:00 e5cae5692b5899631b5bfe5c23234deb5efda10c This reverts commit 11850a6305c5778b180243eb06aefe86762dd4ce, it was causing build failures on numerous bots, including sanitizer-x86_64-linux-bootstrap-ubsan. 
This reverts commit 11850a6305c5778b180243eb06aefe86762dd4ce, it was
causing build failures on numerous bots, including
sanitizer-x86_64-linux-bootstrap-ubsan.
[WebAssembly] Expand setcc of v2i64 2019-10-31T21:22:30+00:00 Thomas Lively tlively@google.com 2019-10-30T05:31:22+00:00 11850a6305c5778b180243eb06aefe86762dd4ce Summary: The SIMD spec does not include i64x2 comparisons, so they need to be expanded. Using setOperationAction to expand them also causes f64x2 comparisons to be expanded, so setCondCodeAction needs to be used instead. But since there are no legal condition codes, the legalizer does not know how to expand the comparisons. We therefore manually unroll the operation, taking care to fill each lane with -1 or 0 rather than 1 or 0 for consistency with the other vector comparisons. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69604 
Summary:
The SIMD spec does not include i64x2 comparisons, so they need to be
expanded. Using setOperationAction to expand them also causes f64x2
comparisons to be expanded, so setCondCodeAction needs to be used
instead. But since there are no legal condition codes, the legalizer
does not know how to expand the comparisons. We therefore manually
unroll the operation, taking care to fill each lane with -1 or 0
rather than 1 or 0 for consistency with the other vector comparisons.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69604
[WebAssembly] Lower SIMD nnan setcc nodes 2019-03-19T00:55:34+00:00 Thomas Lively tlively@google.com 2019-03-19T00:55:34+00:00 0200d62ec7a54b79313bc2c4ccbe51c2a8c5e940 Summary: Adds patterns to lower all the remaining setcc modes: lt, gt, le, and ge. Fixes PR40912. Reviewers: aheejin, sbc100, dschuff Reviewed By: dschuff Subscribers: jgravelle-google, hiraditya, sunfish, jdoerfert, llvm-commits, srj Tags: #llvm Differential Revision: https://reviews.llvm.org/D59519 llvm-svn: 356431 
Summary:
Adds patterns to lower all the remaining setcc modes: lt, gt,
le, and ge. Fixes PR40912.

Reviewers: aheejin, sbc100, dschuff

Reviewed By: dschuff

Subscribers: jgravelle-google, hiraditya, sunfish, jdoerfert, llvm-commits, srj

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59519

llvm-svn: 356431