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<title>llvm-project.git/llvm/test/CodeGen/SystemZ/soft-float-inline-asm-04.ll, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[SystemZ]  Improve handling of inline asm constraints.</title>
<updated>2020-02-05T22:04:16+00:00</updated>
<author>
<name>Jonas Paulsson</name>
<email>paulsson@linux.vnet.ibm.com</email>
</author>
<published>2020-02-04T23:12:36+00:00</published>
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<content type='text'>
The "{=v0}" constraint did not result in the expected error message in the
abscence of the vector facility, because 'v0' matches as a string into the
AnyRegBitRegClass in common code.

This patch adds checks for vector support in case of "{v" and soft-float in
case of "{f" to remedy this.

Review: Ulrich Weigand.
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The "{=v0}" constraint did not result in the expected error message in the
abscence of the vector facility, because 'v0' matches as a string into the
AnyRegBitRegClass in common code.

This patch adds checks for vector support in case of "{v" and soft-float in
case of "{f" to remedy this.

Review: Ulrich Weigand.
</pre>
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