This avoids using report_fatal_error and standardizes the error
message in a subset of the error conditions.

Some SPARC ISA levels and/or extensions are defined in a way such that
the availability of it implies the availability of other, more fundamental
ISA features (for example, targeting 64-bit environment implies that
V9 instructions are available).
Properly set those in the TableGen definitions.

Fixes https://github.com/llvm/llvm-project/issues/142388.

Reviewers: brad0, s-barannikov, arsenm, rorth

Reviewed By: arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/135718

* adjustFixupValue is called even when a R_SPARC_HIX22/R_SPARC_LOX10
  relocation is generated. This will be fixed shortly.
* Enhanced the %h44 test to show that we don't check overflow.
* Test R_SPARC_DISP32 in .gcc_except_table and .eh_frame . The original
  support did not test -filetype=obj output.

The code below the removed check looks generic enough to support
arbitrary integer widths. This change helps 32-bit targets avoid
expensive expansion/libcalls in the case of zero input.

Pull Request: https://github.com/llvm/llvm-project/pull/137197

CTTZ can be implemented in terms of CTLZ, for which there's a native
instruction in VIS3.
Promote i32 CTTZ in that case so that the native instruction gets used.

Reviewers: rorth, brad0, s-barannikov

Reviewed By: s-barannikov

Pull Request: https://github.com/llvm/llvm-project/pull/135894

Update the tests to reflect the change in instruction ordering.
Otherwise there are no changes from the previous commit.

This reverts commit 5e9650ec2deb2f2bb6d5ad28e83bb6cd3c4189e4.

Reviewers: brad0, s-barannikov, rorth

Reviewed By: s-barannikov

Pull Request: https://github.com/llvm/llvm-project/pull/135716

Reviewers: s-barannikov, brad0, rorth

Reviewed By: s-barannikov

Pull Request: https://github.com/llvm/llvm-project/pull/135715