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<title>llvm-project.git/llvm/test/CodeGen/PowerPC/isel.ll, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[PowerPC] Retire PPCExpandISel pass (#84289)</title>
<updated>2024-08-27T01:43:52+00:00</updated>
<author>
<name>Kai Luo</name>
<email>gluokai@gmail.com</email>
</author>
<published>2024-08-27T01:43:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8e901c255df45e38cb1d69a576804029e20868bf'/>
<id>8e901c255df45e38cb1d69a576804029e20868bf</id>
<content type='text'>
We can decide whether to expand isel or not in instruction selection
pass and early-if-conversion pass. The transformation implemented in
PPCExpandISel can be retired considering PPC backend doesn't generate
`isel` instructions post-RA.
Also if we are seeking performant branch-or-isel decision, we can turn
to selectoptimize pass.

---------

Co-authored-by: Kai Luo &lt;lkail@cn.ibm.com&gt;</content>
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<pre>
We can decide whether to expand isel or not in instruction selection
pass and early-if-conversion pass. The transformation implemented in
PPCExpandISel can be retired considering PPC backend doesn't generate
`isel` instructions post-RA.
Also if we are seeking performant branch-or-isel decision, we can turn
to selectoptimize pass.

---------

Co-authored-by: Kai Luo &lt;lkail@cn.ibm.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>[PowerPC] Expand ISEL instruction into if-then-else sequence.</title>
<updated>2017-01-16T20:12:26+00:00</updated>
<author>
<name>Tony Jiang</name>
<email>jtony@ca.ibm.com</email>
</author>
<published>2017-01-16T20:12:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8e8c444d3ddf2c6ca045a2487070e0ac30a63dda'/>
<id>8e8c444d3ddf2c6ca045a2487070e0ac30a63dda</id>
<content type='text'>
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

llvm-svn: 292154
</content>
<content type='xhtml'>
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<pre>
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

llvm-svn: 292154
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence."</title>
<updated>2017-01-16T15:01:07+00:00</updated>
<author>
<name>Tony Jiang</name>
<email>jtony@ca.ibm.com</email>
</author>
<published>2017-01-16T15:01:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8da139a9fd06dbee54cccc452860e42e847501bc'/>
<id>8da139a9fd06dbee54cccc452860e42e847501bc</id>
<content type='text'>
This reverts commit 1d0e0374438ca6e153844c683826ba9b82486bb1.

llvm-svn: 292131
</content>
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<pre>
This reverts commit 1d0e0374438ca6e153844c683826ba9b82486bb1.

llvm-svn: 292131
</pre>
</div>
</content>
</entry>
<entry>
<title>[PowerPC] Expand ISEL instruction into if-then-else sequence.</title>
<updated>2017-01-16T14:43:12+00:00</updated>
<author>
<name>Tony Jiang</name>
<email>jtony@ca.ibm.com</email>
</author>
<published>2017-01-16T14:43:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7630b8c5ee3109986a013b71f7b9352b23101aad'/>
<id>7630b8c5ee3109986a013b71f7b9352b23101aad</id>
<content type='text'>
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

llvm-svn: 292128
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

llvm-svn: 292128
</pre>
</div>
</content>
</entry>
<entry>
<title>Adding -verify-machineinstrs option to PowerPC tests</title>
<updated>2016-08-03T18:17:35+00:00</updated>
<author>
<name>Ehsan Amiri</name>
<email>amehsan@ca.ibm.com</email>
</author>
<published>2016-08-03T18:17:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a538b0f023e858d0f71a1295bb9084e851ddd361'/>
<id>a538b0f023e858d0f71a1295bb9084e851ddd361</id>
<content type='text'>
Currently we have a number of tests that fail with -verify-machineinstrs.
To detect this cases earlier we add the option to the testcases with the
exception of tests that will currently fail with this option. PR 27456 keeps
track of this failures.

No code review, as discussed with Hal Finkel.

llvm-svn: 277624
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently we have a number of tests that fail with -verify-machineinstrs.
To detect this cases earlier we add the option to the testcases with the
exception of tests that will currently fail with this option. PR 27456 keeps
track of this failures.

No code review, as discussed with Hal Finkel.

llvm-svn: 277624
</pre>
</div>
</content>
</entry>
<entry>
<title>Add support for the PPC isel instruction.</title>
<updated>2012-06-22T23:10:08+00:00</updated>
<author>
<name>Hal Finkel</name>
<email>hfinkel@anl.gov</email>
</author>
<published>2012-06-22T23:10:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=460e94d84297d32aac0b3ccb88b80fc57433bfae'/>
<id>460e94d84297d32aac0b3ccb88b80fc57433bfae</id>
<content type='text'>
The isel (integer select) instruction is supported on the 440 and A2
embedded cores and on the POWER7.

llvm-svn: 159045
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The isel (integer select) instruction is supported on the 440 and A2
embedded cores and on the POWER7.

llvm-svn: 159045
</pre>
</div>
</content>
</entry>
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