llvm-project.git/llvm/test/CodeGen/PowerPC/cc.ll, branch users/nico/python-2

[PowerPC] Implement SchedModel for Power7

2023-09-13T06:55:07+00:00

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D158704

Adding -verify-machineinstrs option to PowerPC tests

2016-08-03T18:17:35+00:00

Currently we have a number of tests that fail with -verify-machineinstrs.
To detect this cases earlier we add the option to the testcases with the
exception of tests that will currently fail with this option. PR 27456 keeps
track of this failures.

No code review, as discussed with Hal Finkel.

llvm-svn: 277624

[PowerPC] 'cc' should be an alias only to 'cr0'

2014-12-04T00:46:20+00:00

We had mistakenly believed that GCC's 'cc' referred to the entire
condition-code register (cr0 through cr7) -- and implemented this in r205630 to
fix PR19326, but 'cc' is actually an alias only to 'cr0'. This is causing LLVM
to clobber too much with legacy code with inline asm using the 'cc' clobber.

Fixes PR21451.

llvm-svn: 223328

[PowerPC] Add a full condition code register to make the "cc" clobber work

2014-04-04T15:15:57+00:00

gcc inline asm supports specifying "cc" as a clobber of all condition
registers. Add just enough modeling of the full register to make this work.
Fixed PR19326.

llvm-svn: 205630