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<title>llvm-project.git/llvm/test/CodeGen/PowerPC/aix-tocdata-fastisel.ll, branch users/nico/python-2</title>
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<title>[PowerPC] handle toc-data in load selection of fast-isel (#91916)</title>
<updated>2024-05-24T03:09:37+00:00</updated>
<author>
<name>Chen Zheng</name>
<email>czhengsz@cn.ibm.com</email>
</author>
<published>2024-05-24T03:09:37+00:00</published>
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<id>cd9bab2e2acbdc22943703d5649dede72b09cad7</id>
<content type='text'>
Support the address selection for toc-data globals in fast isel. This
benefits instruction selection for fast-isel for toc data symbol for
example for load selection. This also aligns the code generation
with/without -mtocdata.</content>
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Support the address selection for toc-data globals in fast isel. This
benefits instruction selection for fast-isel for toc data symbol for
example for load selection. This also aligns the code generation
with/without -mtocdata.</pre>
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</entry>
<entry>
<title>[PPC] add testcase, nfc</title>
<updated>2024-05-13T05:49:00+00:00</updated>
<author>
<name>Chen Zheng</name>
<email>czhengsz@cn.ibm.com</email>
</author>
<published>2024-05-13T05:32:25+00:00</published>
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