llvm-project.git/llvm/test/CodeGen/NVPTX/misaligned-vector-ldst.ll, branch users/mingmingl-llvm/samplefdo-profile-format

Reland "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines" (#155063)

2025-08-25T16:15:44+00:00

The original version of this change inadvertently dropped
b6e19b35cd87f3167a0f04a61a12016b935ab1ea. This version retains that fix
as well as adding tests for it and an explanation for why it is needed.

Revert "[NVPTX] Legalize aext-load to zext-load to expose more DAG combines (#154251)"

2025-08-22T21:13:58+00:00

Causes failures in the LLVM libc test suite
https://lab.llvm.org/buildbot/#/builders/69/builds/26327/steps/12/logs/stdio.

This reverts commit a3ed96b899baddd4865f1ef09f01a83da011db5c.

[NVPTX] Legalize aext-load to zext-load to expose more DAG combines (#154251)

2025-08-21T22:33:23+00:00

[NVPTX] Disable v2f32 registers when no operations supported, or via cl::opt (#154476)

2025-08-21T17:30:36+00:00

The addition of v2f32 as a legal type, supported by the B64 register
class, has caused performance regressions, broken inline assembly, and
resulted in a couple (now fixed) mis-compilations. In order to mitigate
these issues, only mark this as a legal type when there exist operations
that support it, since for targets where this is not the case it serves
no purpose. To enable further debugging, add an option to disable v2f32.

In order to allow for a target-dependent set of legal types,
ComputePTXValueVTs has been fully re-written to take advantage of
TargetLowering call-lowering APIs.

[NVPTX] support f32x2 instructions for sm_100+ (#126337)

2025-07-11T18:50:50+00:00

Lower `fadd`, `fsub`, `fmul`, and `fma` to f32x2 variants introduced in
PTX 8.6 for sm_100+. Adds a new register class for v2f32 as a b64
register in PTX. This causes other vector operations like loads and
stores to lower as .b64 instead of .v2.b32 as appropriate.

Also update test cases to use the autogenerator.

[NVPTX] use untyped loads and stores where ever possible (#137698)

2025-05-10T15:26:26+00:00

In most cases, the type information attached to load and store
instructions is meaningless and inconsistently applied. We can usually
use ".b" loads and avoid the complexity of trying to assign the correct
type. The one expectation is sign-extending load, which will continue to
use ".s" to ensure the sign extension into a larger register is done
correctly.

[NVPTX,test] Change llc -march= to -mtriple=

2024-12-15T18:45:11+00:00

Similar to 806761a7629df268c8aed49657aeccffa6bca449

-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple (e.g. Windows, macOS),
leaving a target triple which may not make sense.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
nvptx{,64}-apple-darwin as ELF instead of rejecting it outrightly.

[NVPTX] Convert some tests to opaque pointers (NFC)

2022-12-19T11:57:23+00:00

[NVPTX] Integrate ptxas to LIT tests

2022-04-28T11:59:45+00:00

ptxas is a proprietary compiler from Nvidia that can compile PTX to
machine code (SASS). It has a lot of diagnostics to catch errors
in PTX, which can be used to verify PTX output from llc.

Set -DPXTAS_EXECUTABLE=/path/to/ptxas CMake option to enable it.
If this option is not set, then ptxas is substituted to true which
effectively disables all ptxas RUN lines.

LLVM_PTXAS_EXECUTABLE environment variable takes precedence over
the CMake option, and allows to override ptxas executable that is used for LIT
without complete re-configuration.

Differential Revision: https://reviews.llvm.org/D121727

[NVPTX] Fixed lowering of unaligned loads/stores of f16 scalars and vectors.

2017-03-07T20:33:38+00:00

Differential Revision: https://reviews.llvm.org/D30672

llvm-svn: 297198