llvm-project.git/llvm/test/CodeGen/Mips/nmadd.ll, branch users/nico/python-2

[test] Change llc -march=mips* to -mtriple=mips*

2024-12-11T06:14:06+00:00

Similar to 806761a7629df268c8aed49657aeccffa6bca449

[llvm] Fix missing FileCheck directive colons

2020-04-06T15:59:08+00:00

https://reviews.llvm.org/D77352

[mips] Correct the instruction predicates for microMIPSr3

2017-10-10T20:52:53+00:00

Rather than using the AdditionalPredicates mechanism to guard
the microMIPS instructions, use the existing predicates to properly
guard those instructions.

This also resolves a case where an instruction pattern was incorrectly
available for microMIPS32R6, which caused a register allocation failure
as the registers specified in the pattern were not available.

Reviewers: nitesh.jain, atanasyan

Differential Revision: https://reviews.llvm.org/D38451

llvm-svn: 315362

[mips] Generate NMADD and NMSUB instructions when fneg node is present

2017-08-27T21:07:24+00:00

This patch enables generation of NMADD and NMSUB instructions when fneg node
is present. These instructions are currently only generated if fsub node is
present.

Patch by Stanislav Ocovaj.

Differential Revision: https://reviews.llvm.org/D34507

llvm-svn: 311862