llvm-project.git/llvm/test/CodeGen/Mips/avoid-zero-copy.mir, branch users/nico/python-2 Unnamed repository; edit this file 'description' to name the repository. [MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001) 2024-03-18T14:37:59+00:00 Jonas Paulsson paulson1@linux.ibm.com 2024-03-18T14:37:59+00:00 09bc6abba6e226ad5e9d18d4365690d6f04de21a - Use computeMaxCallFrameSize() in PEI::calculateCallFrameInfo() instead of duplicating the code. - Set AdjustsStack in FinalizeISel instead of in computeMaxCallFrameSize(). 
- Use computeMaxCallFrameSize() in PEI::calculateCallFrameInfo() instead of duplicating the code.

- Set AdjustsStack in FinalizeISel instead of in computeMaxCallFrameSize().
 Add all constant physical registers to callee preserved masks 2022-09-21T12:50:12+00:00 Alex Richardson Alexander.Richardson@cl.cam.ac.uk 2022-09-20T13:42:32+00:00 b84be9f2f1acb7229e4a4fa12e0832854c22bd57 This allows MachineCopyPropagation to eliminate copies of constant registers such as zero registers. They were previously not being eliminated as the check for MO.clobbersPhysReg(AvailSrc) would return true for constant registers such as MIPS $zero. To avoid having to manually add the zero registers to all CalleeSavedRegs instantiations in tablegen, I instead added a new isConstant bit to the Register and set this for MIPS, RISC-V, and AArch64 zero registers. RegisterInfoEmitter.cpp looks at this flag and adds all constant registers to the preserved register mask. This may also benefit other passes but so far I have only seen differences in MachineCopyPropagation. In the future it might make sense to generate `isConstantPhysReg()` from this information. Original source: https://github.com/CTSRD-CHERI/llvm-project/commit/8588d8b81458ed6d87b674893e7752e6a6915574 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D131958 
This allows MachineCopyPropagation to eliminate copies of constant registers
such as zero registers. They were previously not being eliminated as the
check for MO.clobbersPhysReg(AvailSrc) would return true for constant
registers such as MIPS $zero.

To avoid having to manually add the zero registers to all CalleeSavedRegs
instantiations in tablegen, I instead added a new isConstant bit to the
Register and set this for MIPS, RISC-V, and AArch64 zero registers.
RegisterInfoEmitter.cpp looks at this flag and adds all constant registers
to the preserved register mask.

This may also benefit other passes but so far I have only seen differences
in MachineCopyPropagation. In the future it might make sense to generate
`isConstantPhysReg()` from this information.

Original source: https://github.com/CTSRD-CHERI/llvm-project/commit/8588d8b81458ed6d87b674893e7752e6a6915574

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D131958
Add a baseline test for D131958 2022-09-21T12:50:12+00:00 Alex Richardson alexrichardson@google.com 2022-09-20T13:40:37+00:00 963287acbf42867a8f7a14b1db0043daf22174f2 This test shows that the save of MIPS $zero to a callee-saved register is not elided by the machine-cp pass. Differential Revision: https://reviews.llvm.org/D131957 
This test shows that the save of MIPS $zero to a callee-saved register
is not elided by the machine-cp pass.

Differential Revision: https://reviews.llvm.org/D131957