llvm-project.git/llvm/test/CodeGen/LoongArch/lasx, branch users/mingmingl-llvm/samplefdo-profile-format Unnamed repository; edit this file 'description' to name the repository. [LoongArch] Use xvperm.w for cross-lane access within a single vector (#151634) 2025-09-04T02:32:52+00:00 ZhaoQi zhaoqi01@loongson.cn 2025-09-04T02:32:52+00:00 d7a3ab220d50e7022840f5764767b64857771aae 






[LoongArch] Optimize extractelement containing variable index for lasx (#151475)
2025-09-04T01:27:44+00:00

ZhaoQi
zhaoqi01@loongson.cn

2025-09-04T01:27:44+00:00

c5078484ff8cf35c369832d903d363c3019ef3e1

Ideas suggested by: @heiher @tangaac




Ideas suggested by: @heiher @tangaac






[LoongArch] Custom lower vecreduce. (#155196)
2025-09-02T03:44:19+00:00

tangaac
tangyan01@loongson.cn

2025-09-02T03:44:19+00:00

66ba9dc62ba647d5dcefdcab06f21d38f6b2dd5f












[LoongArch] Fix broadcast load with extension. (#155960)
2025-09-01T10:28:17+00:00

tangaac
tangyan01@loongson.cn

2025-09-01T10:28:17+00:00

2320529ff77338cd0cb9786b8f195d611edcae77

PR #135896 introduces [x]vldrepl instructions without handling
extension.
This patch will fix that.




PR #135896 introduces [x]vldrepl instructions without handling
extension.
This patch will fix that.






[LoongArch] Enable vector tests for 32-bit target (#152094)
2025-09-01T07:11:52+00:00

hev
wangrui@loongson.cn

2025-09-01T07:11:52+00:00

31f0ab06e3ae95802db78056b7395497b8c876da












[LoongArch][NFC] Add tests for build_vector containing repeated sub-sequence (#154532)
2025-08-28T08:28:48+00:00

ZhaoQi
zhaoqi01@loongson.cn

2025-08-28T08:28:48+00:00

b0f8f526f5a903a68ff80943ceb50f6e64063ebd












[LoongArch] Custom lower vecreduce_add. (#154304)
2025-08-25T01:06:39+00:00

tangaac
tangyan01@loongson.cn

2025-08-25T01:06:39+00:00

95a4c9c4f02eaffe04e64662d4c9fcbf6694b507












[LoongArch] Pre-commit tests for vecreduce_and/or/... (#154879)
2025-08-22T09:52:43+00:00

tangaac
tangyan01@loongson.cn

2025-08-22T09:52:43+00:00

843977713129614db1b07ce877f59de133c8288e












[LoongArch] Pre-commit for vecreduce_add. (#154302)
2025-08-20T01:12:47+00:00

tangaac
tangyan01@loongson.cn

2025-08-20T01:12:47+00:00

bf6d52a2dd5cbb08b5348cb6de6e563dff5eabb5












[LoongArch] Fix implicit PesudoXVINSGR2VR error (#152432)
2025-08-19T09:22:00+00:00

tangaac
tangyan01@loongson.cn

2025-08-19T09:22:00+00:00

ccbcebcfd3c0db5e6686aff292f128dcd1f56bc8

According to the instructions manual, when `vr0` is changed, high 128
bit of `xr0` is undefined.
Use `vinsgr2vr.b/h` to insert an `i8/i16` to low 128bit of a 256 vector
may cause undefined behavior when high 128bit is used in later
instructions.




According to the instructions manual, when `vr0` is changed, high 128
bit of `xr0` is undefined.
Use `vinsgr2vr.b/h` to insert an `i8/i16` to low 128bit of a 256 vector
may cause undefined behavior when high 128bit is used in later
instructions.