llvm-project.git/llvm/test/CodeGen/ARM/ha-alignstack-call.ll, branch users/nico/python-2 Unnamed repository; edit this file 'description' to name the repository. [DAG] Don't split f64 constant stores if the fp imm is legal (#74622) 2023-12-07T10:33:03+00:00 Simon Pilgrim RKSimon@users.noreply.github.com 2023-12-07T10:33:03+00:00 22df0886a1575439d0bf595f2b3a31c5255e9de6 If the target can generate a specific fp immediate constant, then don't split the store into 2 x i32 stores Another cleanup step for #74304 
If the target can generate a specific fp immediate constant, then don't split the store into 2 x i32 stores

Another cleanup step for #74304
 [ARM] Adjust strd/ldrd codegen alignment requirements 2023-07-14T19:54:18+00:00 Maurice Heumann maurice.heumann@wibu.com 2023-07-14T18:58:56+00:00 a1cdb323e2610a8e9d8f67382c27172f5f3f3511 In change https://reviews.llvm.org/D152790, it was discovered that the alignment requirement calculation for LDRD/STRD codegen was suboptimal and the calculation for volatile loads and stores was adjusted. This change here adopts the calculation for the remaining non-volatile occurances. Recommitting after undefined behavior fix in D155093. Differential Revision: https://reviews.llvm.org/D153800 
In change https://reviews.llvm.org/D152790, it was discovered that the
alignment requirement calculation for LDRD/STRD codegen was suboptimal
and the calculation for volatile loads and stores was adjusted.

This change here adopts the calculation for the remaining non-volatile
occurances.

Recommitting after undefined behavior fix in D155093.

Differential Revision: https://reviews.llvm.org/D153800
Revert "[ARM] Adjust strd/ldrd codegen alignment requirements" 2023-07-03T14:05:49+00:00 David Spickett david.spickett@linaro.org 2023-07-03T13:50:35+00:00 ab3bb86d4487fa904a18b6350901b3a4e9470196 This reverts commit 92a9c30c61da7f973d55cd84fade424159b9cac9. This has caused a test failure in the 2nd stage of Linaro's Arm 32 bit buildbots. LLVM::simplified-template-names.s 7: error: Simplified template DW_AT_name could not be reconstituted: check:10'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 8: original: f3<unsigned char, (unsigned char)'\x00'> check:10'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 9: reconstituted: f3<unsigned char, (unsigned char)'\x7f'> check:10'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ I suspect a load/store is slightly off. 
This reverts commit 92a9c30c61da7f973d55cd84fade424159b9cac9.

This has caused a test failure in the 2nd stage of Linaro's
Arm 32 bit buildbots.

LLVM::simplified-template-names.s

            7: error: Simplified template DW_AT_name could not be reconstituted:
check:10'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            8:  original: f3<unsigned char, (unsigned char)'\x00'>
check:10'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            9:  reconstituted: f3<unsigned char, (unsigned char)'\x7f'>
check:10'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

I suspect a load/store is slightly off.
[ARM] Adjust strd/ldrd codegen alignment requirements 2023-07-02T21:25:25+00:00 Maurice Heumann MauriceHeumann@gmail.com 2023-07-02T19:18:50+00:00 92a9c30c61da7f973d55cd84fade424159b9cac9 In change https://reviews.llvm.org/D152790, it was discovered that the alignment requirement calculation for LDRD/STRD codegen was suboptimal and the calculation for volatile loads and stores was adjusted. This change here adopts the calculation for the remaining non-volatile occurances. Differential Revision: https://reviews.llvm.org/D153800 
In change https://reviews.llvm.org/D152790, it was discovered that the
alignment requirement calculation for LDRD/STRD codegen was suboptimal
and the calculation for volatile loads and stores was adjusted.

This change here adopts the calculation for the remaining non-volatile
occurances.

Differential Revision: https://reviews.llvm.org/D153800
[clang][AArch32] Correctly align HA arguments when passed on the stack 2021-05-10T15:28:46+00:00 Momchil Velikov momchil.velikov@arm.com 2021-05-10T13:53:21+00:00 5c7b43aa8298a389b906d72c792941a0ce57782e Analogously to https://reviews.llvm.org/D98794 this patch uses the `alignstack` attribute to fix incorrect passing of homogeneous aggregate (HA) arguments on AArch32. The EABI/AAPCS was recently updated to clarify how VFP co-processor candidates are aligned: https://github.com/ARM-software/abi-aa/commit/4488e34998514dc7af5507236f279f6881eede62 Differential Revision: https://reviews.llvm.org/D100853 
Analogously to https://reviews.llvm.org/D98794 this patch uses the
`alignstack` attribute to fix incorrect passing of homogeneous
aggregate (HA) arguments on AArch32. The EABI/AAPCS was recently
updated to clarify how VFP co-processor candidates are aligned:
https://github.com/ARM-software/abi-aa/commit/4488e34998514dc7af5507236f279f6881eede62

Differential Revision: https://reviews.llvm.org/D100853