llvm-project.git/llvm/test/CodeGen/ARC, branch main Unnamed repository; edit this file 'description' to name the repository. [ARC,test] Change llc -march= to -mtriple= 2024-12-15T20:29:53+00:00 Fangrui Song i@maskray.me 2024-12-15T20:29:53+00:00 6e8718c3e32225c579a3a974be003c7f38c32a05 Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple (e.g. Windows, macOS), leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize arc-apple-darwin as ELF instead of rejecting it outrightly. 
Similar to 806761a7629df268c8aed49657aeccffa6bca449

-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple (e.g. Windows, macOS),
leaving a target triple which may not make sense.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
arc-apple-darwin as ELF instead of rejecting it outrightly.
[ARC] Convert tests to opaque pointers (NFC) 2024-02-06T20:55:16+00:00 Fangrui Song i@maskray.me 2024-02-06T20:55:15+00:00 1c22d3f55df852985c155742bbe96ab5e86aa6f0 






Set MaxAtomicSizeInBitsSupported for remaining targets. (#75703)
2024-01-09T03:34:28+00:00

James Y Knight
jyknight@google.com

2024-01-09T03:34:28+00:00

b856e77b2df212d740bfedc984572d812d07ecc8

Targets affected:

- NVPTX and BPF: set to 64 bits.
- ARC, Lanai, and MSP430: set to 0 (they don't implement atomics).

Those which didn't yet add AtomicExpandPass to their pass pipeline now
do so.

This will result in larger atomic operations getting expanded to
`__atomic_*` libcalls via AtomicExpandPass. On all these targets, this
now matches what Clang already does in the frontend.

The only targets which do not configure AtomicExpandPass now are:
- DirectX and SPIRV: they aren't normal backends.
- AVR: a single-cpu architecture with no privileged/user divide, which
could implement all atomics by disabling/enabling interrupts, regardless
of size/alignment. Will be addressed by future work.




Targets affected:

- NVPTX and BPF: set to 64 bits.
- ARC, Lanai, and MSP430: set to 0 (they don't implement atomics).

Those which didn't yet add AtomicExpandPass to their pass pipeline now
do so.

This will result in larger atomic operations getting expanded to
`__atomic_*` libcalls via AtomicExpandPass. On all these targets, this
now matches what Clang already does in the frontend.

The only targets which do not configure AtomicExpandPass now are:
- DirectX and SPIRV: they aren't normal backends.
- AVR: a single-cpu architecture with no privileged/user divide, which
could implement all atomics by disabling/enabling interrupts, regardless
of size/alignment. Will be addressed by future work.






[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
2023-05-17T15:03:15+00:00

Tobias Hieta
tobias@hieta.se

2023-05-17T09:01:54+00:00

f84bac329ba6c9f0c022bcf77237e912362e247a

This is a follow-up to b71edfaa4ec3c998aadb35255ce2f60bba2940b0
since I forgot the lit.local.cfg files in that one.

Reformatting is done with `black`.

If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.

If you run into any problems, post to discourse about it and
we will try to help.

RFC Thread below:

https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style

Reviewed By: barannikov88, kwk

Differential Revision: https://reviews.llvm.org/D150762





This is a follow-up to b71edfaa4ec3c998aadb35255ce2f60bba2940b0
since I forgot the lit.local.cfg files in that one.

Reformatting is done with `black`.

If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.

If you run into any problems, post to discourse about it and
we will try to help.

RFC Thread below:

https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style

Reviewed By: barannikov88, kwk

Differential Revision: https://reviews.llvm.org/D150762







[ARC] Regenerate ldst.ll
2022-10-29T13:09:58+00:00

Simon Pilgrim
llvm-dev@redking.me.uk

2022-10-29T13:09:52+00:00

adf3daae1c10b46de4017d7ab0110c215c1b9981

Reported by the (experimental) arc buildbot after D136042





Reported by the (experimental) arc buildbot after D136042







[ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE
2021-09-10T20:04:08+00:00

Mark Schimmel
marksl@synopsys.com

2021-09-10T20:01:51+00:00

7c82db3634c1c8c0319816d4bbaa099c7a532b06

This change improves the code generated for long long addition and subtraction

Differential Revision: https://reviews.llvm.org/D109615





This change improves the code generated for long long addition and subtraction

Differential Revision: https://reviews.llvm.org/D109615







[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions
2021-08-24T18:53:20+00:00

Thomas Johnson
thomasj@synopsys.com

2021-08-24T17:22:34+00:00

ce1dc9d647a7b00eac9a4db33bb7e615e08d5fc2

Differential Revision: https://reviews.llvm.org/D108598





Differential Revision: https://reviews.llvm.org/D108598







[ARC] Add codegen for count trailing zeros intrinsic for the ARC backend
2021-08-10T19:07:35+00:00

Thomas Johnson
thomasj@synopsys.com

2021-08-07T19:05:59+00:00

b82108687689f0d511226433d16895c3da022529

Differential Revision: https://reviews.llvm.org/D107828





Differential Revision: https://reviews.llvm.org/D107828







[ARC] Add codegen for llvm.ctlz intrinsic for the ARC backend
2021-08-06T19:18:06+00:00

Thomas Johnson
thomasj@synopsys.com

2021-08-06T08:56:54+00:00

f8a449514931bf2b3a0b36328e821365ed8bf5c6

    Differential Revision: https://reviews.llvm.org/D107611





    Differential Revision: https://reviews.llvm.org/D107611







[ARC] Update brcc test.
2020-08-29T00:07:25+00:00

Pete Couperus
petecoup@synopsys.com

2020-08-25T18:17:06+00:00

0f661418aa7f967d45f6edb01b4469c8e24ed571