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<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/setcc64.ll, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[AMDGPU,test] Change llc -march= to -mtriple= (#75982)</title>
<updated>2024-01-17T05:54:58+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2024-01-17T05:54:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9e9907f1cfa424366fba58d9520f9305b537cec9'/>
<id>9e9907f1cfa424366fba58d9520f9305b537cec9</id>
<content type='text'>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</content>
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<pre>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Convert some tests to opaque pointers (NFC)</title>
<updated>2022-12-19T11:41:13+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2022-12-19T11:39:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=bdf2fbba9cee60b4b260ff17e4f44c475c11e715'/>
<id>bdf2fbba9cee60b4b260ff17e4f44c475c11e715</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Always select s_cselect_b32 for uniform 'select' SDNode</title>
<updated>2022-09-15T20:03:56+00:00</updated>
<author>
<name>Alexander Timofeev</name>
<email>alexander.timofeev@amd.com</email>
</author>
<published>2022-09-09T17:32:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=fbdea5a2e9169be524463aae6663d958b94a2685'/>
<id>fbdea5a2e9169be524463aae6663d958b94a2685</id>
<content type='text'>
This patch contains changes necessary to carry physical condition register (SCC) dependencies through the SDNode scheduler.  It adds the edge in the SDNodeScheduler dependency graph instead of inserting the SCC copy between each definition and use. This approach lets the scheduler place instructions in an optimal way placing the copy only when the dependency cannot be resolved.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D133593
</content>
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<pre>
This patch contains changes necessary to carry physical condition register (SCC) dependencies through the SDNode scheduler.  It adds the edge in the SDNodeScheduler dependency graph instead of inserting the SCC copy between each definition and use. This approach lets the scheduler place instructions in an optimal way placing the copy only when the dependency cannot be resolved.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D133593
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Fix setcc combine for i128</title>
<updated>2021-10-26T11:39:50+00:00</updated>
<author>
<name>Neubauer, Sebastian</name>
<email>Sebastian.Neubauer@amd.com</email>
</author>
<published>2021-10-25T08:58:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=487f15603e7394658423ab0a0c9afd3d51cd068d'/>
<id>487f15603e7394658423ab0a0c9afd3d51cd068d</id>
<content type='text'>
The combine asserted if constants could not be represented as uint64_t.
Use APInts to fix this.

Differential Revision: https://reviews.llvm.org/D112416
</content>
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<pre>
The combine asserted if constants could not be represented as uint64_t.
Use APInts to fix this.

Differential Revision: https://reviews.llvm.org/D112416
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Divergence-driven compare operations instruction selection</title>
<updated>2021-08-25T15:30:49+00:00</updated>
<author>
<name>alex-t</name>
<email>alexander.timofeev@amd.com</email>
</author>
<published>2021-07-15T16:43:56+00:00</published>
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<id>ed0f4415f002c34ef85e1e4ac2f676cf5314afbe</id>
<content type='text'>
Description: This change enables the compare operations to be selected to SALU/VALU form
             dependent of the SDNode divergence flag.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D106079
</content>
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<pre>
Description: This change enables the compare operations to be selected to SALU/VALU form
             dependent of the SDNode divergence flag.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D106079
</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC] Removed unused prefixes in CodeGen/AMDGPU</title>
<updated>2021-01-07T16:00:11+00:00</updated>
<author>
<name>Mircea Trofin</name>
<email>mtrofin@google.com</email>
</author>
<published>2021-01-06T18:34:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e881a25f1e110b259030745b3592418ea0c8efe8'/>
<id>e881a25f1e110b259030745b3592418ea0c8efe8</id>
<content type='text'>
This covers tests starting with s.

Differential Revision: https://reviews.llvm.org/D94184
</content>
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<pre>
This covers tests starting with s.

Differential Revision: https://reviews.llvm.org/D94184
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[AMDGPU] Enable compare operations to be selected by divergence"</title>
<updated>2020-06-24T15:21:30+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2020-06-24T14:27:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=778351df777b89641cadf038b17e416b0bbf31ab'/>
<id>778351df777b89641cadf038b17e416b0bbf31ab</id>
<content type='text'>
This reverts commit 521ac0b5cea02f629d035f807460affbb65ae7ad.

Reported to break thousands of piglit tests.
</content>
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<pre>
This reverts commit 521ac0b5cea02f629d035f807460affbb65ae7ad.

Reported to break thousands of piglit tests.
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Enable compare operations to be selected by divergence</title>
<updated>2020-06-24T08:50:40+00:00</updated>
<author>
<name>alex-t</name>
<email>alexander.timofeev@amd.com</email>
</author>
<published>2020-06-19T14:51:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=521ac0b5cea02f629d035f807460affbb65ae7ad'/>
<id>521ac0b5cea02f629d035f807460affbb65ae7ad</id>
<content type='text'>
Summary: Details: This patch enables SETCC to be selected to S_CMP_* if uniform and V_CMP_* if divergent.

Reviewers: rampitec, arsenm

Reviewed By: rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82194
</content>
<content type='xhtml'>
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<pre>
Summary: Details: This patch enables SETCC to be selected to S_CMP_* if uniform and V_CMP_* if divergent.

Reviewers: rampitec, arsenm

Reviewed By: rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82194
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel</title>
<updated>2017-03-21T21:39:51+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2017-03-21T21:39:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3dbeefa978fb7e7b231b249f9cd90c67b9e83277'/>
<id>3dbeefa978fb7e7b231b249f9cd90c67b9e83277</id>
<content type='text'>
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

llvm-svn: 298444
</content>
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<pre>
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

llvm-svn: 298444
</pre>
</div>
</content>
</entry>
<entry>
<title>Enable FeatureFlatForGlobal on Volcanic Islands</title>
<updated>2017-01-24T22:02:15+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2017-01-24T22:02:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7aad8fd8f45e07d72e50792aec18c2b476bdd96e'/>
<id>7aad8fd8f45e07d72e50792aec18c2b476bdd96e</id>
<content type='text'>
This switches to the workaround that HSA defaults to
for the mesa path.

This should be applied to the 4.0 branch.

Patch by Vedran Miletić &lt;vedran@miletic.net&gt;

llvm-svn: 292982
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This switches to the workaround that HSA defaults to
for the mesa path.

This should be applied to the 4.0 branch.

Patch by Vedran Miletić &lt;vedran@miletic.net&gt;

llvm-svn: 292982
</pre>
</div>
</content>
</entry>
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