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<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/sdiv.ll, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>MachineScheduler: Reset next cluster candidate for each node (#139513)</title>
<updated>2025-05-28T06:53:46+00:00</updated>
<author>
<name>Ruiling, Song</name>
<email>ruiling.song@amd.com</email>
</author>
<published>2025-05-28T06:53:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3e47d8debad01801dcc2128001f2f1465c29b748'/>
<id>3e47d8debad01801dcc2128001f2f1465c29b748</id>
<content type='text'>
When a node is picked, we should reset its next cluster candidate to
null before releasing its successors/predecessors.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When a node is picked, we should reset its next cluster candidate to
null before releasing its successors/predecessors.</pre>
</div>
</content>
</entry>
<entry>
<title>Reapply [AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (#135243)</title>
<updated>2025-04-10T20:18:21+00:00</updated>
<author>
<name>alex-t</name>
<email>alex-t@users.noreply.github.com</email>
</author>
<published>2025-04-10T20:18:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=edd7b559c09e8e9b1fd0fc1905f0aaa67c74331f'/>
<id>edd7b559c09e8e9b1fd0fc1905f0aaa67c74331f</id>
<content type='text'>
LIT tests which were incorrectly merged are corrected.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
LIT tests which were incorrectly merged are corrected.</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (#134153)"</title>
<updated>2025-04-10T17:20:01+00:00</updated>
<author>
<name>Nico Weber</name>
<email>thakis@chromium.org</email>
</author>
<published>2025-04-10T17:20:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=464035fc7de52b6fe9b09c9f4c9a19fd5d46fcae'/>
<id>464035fc7de52b6fe9b09c9f4c9a19fd5d46fcae</id>
<content type='text'>
This reverts commit 0563569978fee1e780a560494c89869074933f58.

Breaks tests, see comments on https://github.com/llvm/llvm-project/pull/134153
</content>
<content type='xhtml'>
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<pre>
This reverts commit 0563569978fee1e780a560494c89869074933f58.

Breaks tests, see comments on https://github.com/llvm/llvm-project/pull/134153
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (#134153)</title>
<updated>2025-04-10T16:30:52+00:00</updated>
<author>
<name>alex-t</name>
<email>alex-t@users.noreply.github.com</email>
</author>
<published>2025-04-10T16:30:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=0563569978fee1e780a560494c89869074933f58'/>
<id>0563569978fee1e780a560494c89869074933f58</id>
<content type='text'>
PHI operands and results must belong to the same register class.
If a PHI node produces an SGPR, but one of its operands is a VGPR, we
insert a VGPR-to-SGPR copy in the operand’s source block. The PHI
operand is then updated to use the destination register of the inserted
copy.

These inserted copies are processed immediately when they are created.
Therefore, we should avoid reprocessing them when handling their parent
block later.

---------

Co-authored-by: Matt Arsenault &lt;arsenm2@gmail.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PHI operands and results must belong to the same register class.
If a PHI node produces an SGPR, but one of its operands is a VGPR, we
insert a VGPR-to-SGPR copy in the operand’s source block. The PHI
operand is then updated to use the destination register of the inserted
copy.

These inserted copies are processed immediately when they are created.
Therefore, we should avoid reprocessing them when handling their parent
block later.

---------

Co-authored-by: Matt Arsenault &lt;arsenm2@gmail.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Move insertion into V2SCopies map (#130776)</title>
<updated>2025-03-18T16:28:49+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-03-18T16:28:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=dea5aa73fa1984eddde14308803bdfca56f2bc14'/>
<id>dea5aa73fa1984eddde14308803bdfca56f2bc14</id>
<content type='text'>
Insert the start instruction directly into the map before the uses. This
prevents improperly re-visting sgpr-&gt;vgpr phi inputs multiple times
which
would trigger a use after free.

I don't particularly trust the iteration scheme here. This is also
unnecessarily revisting transitive users of a phi or reg_sequence for
every
input operand, but I will address that separately.

Fixes #130646. I also believe it fixes #130119, although that test fails
less consistently for me.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Insert the start instruction directly into the map before the uses. This
prevents improperly re-visting sgpr-&gt;vgpr phi inputs multiple times
which
would trigger a use after free.

I don't particularly trust the iteration scheme here. This is also
unnecessarily revisting transitive users of a phi or reg_sequence for
every
input operand, but I will address that separately.

Fixes #130646. I also believe it fixes #130119, although that test fails
less consistently for me.</pre>
</div>
</content>
</entry>
<entry>
<title>PeepholeOpt: Do not add subregister indexes to reg_sequence operands (#124111)</title>
<updated>2025-01-30T13:42:02+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-01-30T13:42:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=d246cc618adc52fdbd69d44a2a375c8af97b6106'/>
<id>d246cc618adc52fdbd69d44a2a375c8af97b6106</id>
<content type='text'>
Given the rest of the pass just gives up when it needs to compose
subregisters, folding a subregister extract directly into a reg_sequence
is counterproductive. Later fold attempts in the function will give up
on the subregister operand, preventing looking up through the reg_sequence.

It may still be profitable to do these folds if we start handling
the composes. There are some test regressions, but this mostly
looks better.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Given the rest of the pass just gives up when it needs to compose
subregisters, folding a subregister extract directly into a reg_sequence
is counterproductive. Later fold attempts in the function will give up
on the subregister operand, preventing looking up through the reg_sequence.

It may still be profitable to do these folds if we start handling
the composes. There are some test regressions, but this mostly
looks better.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Occupancy w.r.t. workgroup size range is also a range (#123748)</title>
<updated>2025-01-23T15:07:57+00:00</updated>
<author>
<name>Lucas Ramirez</name>
<email>11032120+lucas-rami@users.noreply.github.com</email>
</author>
<published>2025-01-23T15:07:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6206f5444fc0732e6495703c75a67f1f90f5b418'/>
<id>6206f5444fc0732e6495703c75a67f1f90f5b418</id>
<content type='text'>
Occupancy (i.e., the number of waves per EU) depends, in addition to
register usage, on per-workgroup LDS usage as well as on the range of
possible workgroup sizes. Mirroring the latter, occupancy should
therefore be expressed as a range since different group sizes generally
yield different achievable occupancies.

`getOccupancyWithLocalMemSize` currently returns a scalar occupancy
based on the maximum workgroup size and LDS usage. With respect to the
workgroup size range, this scalar can be the minimum, the maximum, or
neither of the two of the range of achievable occupancies. This commit
fixes the function by making it compute and return the range of
achievable occupancies w.r.t. workgroup size and LDS usage; it also
renames it to `getOccupancyWithWorkGroupSizes` since it is the range of
workgroup sizes that produces the range of achievable occupancies.

Computing the achievable occupancy range is surprisingly involved.
Minimum/maximum workgroup sizes do not necessarily yield maximum/minimum
occupancies i.e., sometimes workgroup sizes inside the range yield the
occupancy bounds. The implementation finds these sizes in constant time;
heavy documentation explains the rationale behind the sometimes
relatively obscure calculations.

As a justifying example, consider a target with 10 waves / EU, 4 EUs/CU,
64-wide waves. Also consider a function with no LDS usage and a flat
workgroup size range of [513,1024].

- A group of 513 items requires 9 waves per group. Only 4 groups made up
of 9 waves each can fit fully on a CU at any given time, for a total of
36 waves on the CU, or 9 per EU. However, filling as much as possible
the remaining 40-36=4 wave slots without decreasing the number of groups
reveals that a larger group of 640 items yields 40 waves on the CU, or
10 per EU.
- Similarly, a group of 1024 items requires 16 waves per group. Only 2
groups made up of 16 waves each can fit fully on a CU ay any given time,
for a total of 32 waves on the CU, or 8 per EU. However, removing as
many waves as possible from the groups without being able to fit another
equal-sized group on the CU reveals that a smaller group of 896 items
yields 28 waves on the CU, or 7 per EU.

Therefore the achievable occupancy range for this function is not [8,9]
as the group size bounds directly yield, but [7,10].

Naturally this change causes a lot of test churn as instruction
scheduling is driven by achievable occupancy estimates. In most unit
tests the flat workgroup size range is the default [1,1024] which,
ignoring potential LDS limitations, would previously produce a scalar
occupancy of 8 (derived from 1024) on a lot of targets, whereas we now
consider the maximum occupancy to be 10 in such cases. Most tests are
updated automatically and checked manually for sanity. I also manually
changed some non-automatically generated assertions when necessary.

Fixes #118220.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Occupancy (i.e., the number of waves per EU) depends, in addition to
register usage, on per-workgroup LDS usage as well as on the range of
possible workgroup sizes. Mirroring the latter, occupancy should
therefore be expressed as a range since different group sizes generally
yield different achievable occupancies.

`getOccupancyWithLocalMemSize` currently returns a scalar occupancy
based on the maximum workgroup size and LDS usage. With respect to the
workgroup size range, this scalar can be the minimum, the maximum, or
neither of the two of the range of achievable occupancies. This commit
fixes the function by making it compute and return the range of
achievable occupancies w.r.t. workgroup size and LDS usage; it also
renames it to `getOccupancyWithWorkGroupSizes` since it is the range of
workgroup sizes that produces the range of achievable occupancies.

Computing the achievable occupancy range is surprisingly involved.
Minimum/maximum workgroup sizes do not necessarily yield maximum/minimum
occupancies i.e., sometimes workgroup sizes inside the range yield the
occupancy bounds. The implementation finds these sizes in constant time;
heavy documentation explains the rationale behind the sometimes
relatively obscure calculations.

As a justifying example, consider a target with 10 waves / EU, 4 EUs/CU,
64-wide waves. Also consider a function with no LDS usage and a flat
workgroup size range of [513,1024].

- A group of 513 items requires 9 waves per group. Only 4 groups made up
of 9 waves each can fit fully on a CU at any given time, for a total of
36 waves on the CU, or 9 per EU. However, filling as much as possible
the remaining 40-36=4 wave slots without decreasing the number of groups
reveals that a larger group of 640 items yields 40 waves on the CU, or
10 per EU.
- Similarly, a group of 1024 items requires 16 waves per group. Only 2
groups made up of 16 waves each can fit fully on a CU ay any given time,
for a total of 32 waves on the CU, or 8 per EU. However, removing as
many waves as possible from the groups without being able to fit another
equal-sized group on the CU reveals that a smaller group of 896 items
yields 28 waves on the CU, or 7 per EU.

Therefore the achievable occupancy range for this function is not [8,9]
as the group size bounds directly yield, but [7,10].

Naturally this change causes a lot of test churn as instruction
scheduling is driven by achievable occupancy estimates. In most unit
tests the flat workgroup size range is the default [1,1024] which,
ignoring potential LDS limitations, would previously produce a scalar
occupancy of 8 (derived from 1024) on a lot of targets, whereas we now
consider the maximum occupancy to be 10 in such cases. Most tests are
updated automatically and checked manually for sanity. I also manually
changed some non-automatically generated assertions when necessary.

Fixes #118220.</pre>
</div>
</content>
</entry>
<entry>
<title>Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)"</title>
<updated>2024-11-09T01:21:16+00:00</updated>
<author>
<name>Shilei Tian</name>
<email>i@tianshilei.me</email>
</author>
<published>2024-11-09T01:21:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6548b6354d1d990e1c98736f5e7c3de876bedc8e'/>
<id>6548b6354d1d990e1c98736f5e7c3de876bedc8e</id>
<content type='text'>
This reverts commit ca33649abe5fad93c57afef54e43ed9b3249cd86.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit ca33649abe5fad93c57afef54e43ed9b3249cd86.
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)"</title>
<updated>2024-11-08T21:36:35+00:00</updated>
<author>
<name>Shilei Tian</name>
<email>i@tianshilei.me</email>
</author>
<published>2024-11-08T21:36:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ca33649abe5fad93c57afef54e43ed9b3249cd86'/>
<id>ca33649abe5fad93c57afef54e43ed9b3249cd86</id>
<content type='text'>
This reverts commit e215a1e27d84adad2635a52393621eb4fa439dc9 as it broke both
hip and openmp buildbots.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit e215a1e27d84adad2635a52393621eb4fa439dc9 as it broke both
hip and openmp buildbots.
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)</title>
<updated>2024-11-08T18:05:35+00:00</updated>
<author>
<name>Shilei Tian</name>
<email>i@tianshilei.me</email>
</author>
<published>2024-11-08T18:05:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e215a1e27d84adad2635a52393621eb4fa439dc9'/>
<id>e215a1e27d84adad2635a52393621eb4fa439dc9</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
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