<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/scratch-simple.ll, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>MachineScheduler: Reset next cluster candidate for each node (#139513)</title>
<updated>2025-05-28T06:53:46+00:00</updated>
<author>
<name>Ruiling, Song</name>
<email>ruiling.song@amd.com</email>
</author>
<published>2025-05-28T06:53:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3e47d8debad01801dcc2128001f2f1465c29b748'/>
<id>3e47d8debad01801dcc2128001f2f1465c29b748</id>
<content type='text'>
When a node is picked, we should reset its next cluster candidate to
null before releasing its successors/predecessors.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When a node is picked, we should reset its next cluster candidate to
null before releasing its successors/predecessors.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][AMDGPU] Update tests to use autogened CHECKs (#140648)</title>
<updated>2025-05-20T02:47:40+00:00</updated>
<author>
<name>Chinmay Deshpande</name>
<email>chdeshpa@amd.com</email>
</author>
<published>2025-05-20T02:47:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e264cff6fd676784adf1e436747259548ba708f8'/>
<id>e264cff6fd676784adf1e436747259548ba708f8</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Replace some float undef test uses with poison (#131090)</title>
<updated>2025-03-13T13:07:48+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-03-13T13:07:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=024df9c9dc163f8815a6d57efa46e4f21c003ba1'/>
<id>024df9c9dc163f8815a6d57efa46e4f21c003ba1</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Replace undef with poison in tests using insertvalue (#130895)</title>
<updated>2025-03-12T09:11:11+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-03-12T09:11:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=5a0a2f8239d34332000009a05e7972f0303ac746'/>
<id>5a0a2f8239d34332000009a05e7972f0303ac746</id>
<content type='text'>
perl -p -i -e 's/insertvalue (.*) undef/insertvalue \1 poison/g'</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
perl -p -i -e 's/insertvalue (.*) undef/insertvalue \1 poison/g'</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Default to selecting frame indexes to SGPRs (#115060)</title>
<updated>2024-11-09T03:01:59+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2024-11-09T03:01:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1bf385f10291101163a346c8f075d56e1578351b'/>
<id>1bf385f10291101163a346c8f075d56e1578351b</id>
<content type='text'>
Only select to a VGPR if it's trivally used in VGPR only contexts.
This fixes mishandling frame indexes used in SGPR only contexts,
like inline assembly constraints.

This is suboptimal in the common case where the frame index
is transitively used by only VALU ops. We make up for this by later
folding the copy to VALU plus scalar op in SIFoldOperands.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Only select to a VGPR if it's trivally used in VGPR only contexts.
This fixes mishandling frame indexes used in SGPR only contexts,
like inline assembly constraints.

This is suboptimal in the common case where the frame index
is transitively used by only VALU ops. We make up for this by later
folding the copy to VALU plus scalar op in SIFoldOperands.</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Handle v_add* in eliminateFrameIndex (#102346)</title>
<updated>2024-10-02T17:19:45+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2024-10-02T17:19:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f2eeb3dc7b438e4216ac6b970129b607d6de31f9'/>
<id>f2eeb3dc7b438e4216ac6b970129b607d6de31f9</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)</title>
<updated>2024-02-09T08:20:25+00:00</updated>
<author>
<name>Diana Picus</name>
<email>Diana-Magda.Picus@amd.com</email>
</author>
<published>2024-02-09T08:20:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=bc6955f18ced3ca89d49bc28eeb58cd6d367e136'/>
<id>bc6955f18ced3ca89d49bc28eeb58cd6d367e136</id>
<content type='text'>
At the moment, the emergency spill slot is a fixed object for entry
functions and chain functions, and a regular stack object otherwise.
This patch adopts the latter behaviour for entry/chain functions too. It
seems this was always the intention [1] and it will also save us a bit
of stack space in cases where the first stack object has a large
alignment.

[1]
https://github.com/llvm/llvm-project/commit/34c8b835b16fb3879f1b9770e91df21883356bb6</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At the moment, the emergency spill slot is a fixed object for entry
functions and chain functions, and a regular stack object otherwise.
This patch adopts the latter behaviour for entry/chain functions too. It
seems this was always the intention [1] and it will also save us a bit
of stack space in cases where the first stack object has a large
alignment.

[1]
https://github.com/llvm/llvm-project/commit/34c8b835b16fb3879f1b9770e91df21883356bb6</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)</title>
<updated>2023-09-15T10:29:24+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2023-09-15T10:29:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ceb68eea8c5cfd7893d55afaef93932762bbebaa'/>
<id>ceb68eea8c5cfd7893d55afaef93932762bbebaa</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[test] Change llc -march= to -mtriple=</title>
<updated>2023-09-11T21:42:37+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2023-09-11T21:42:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=806761a7629df268c8aed49657aeccffa6bca449'/>
<id>806761a7629df268c8aed49657aeccffa6bca449</id>
<content type='text'>
The issue is uncovered by #47698: for IR files without a target triple,
-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple, leaving a target triple which
may not make sense, e.g. riscv64-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without a target
triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead
of rejecting it outrightly.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The issue is uncovered by #47698: for IR files without a target triple,
-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple, leaving a target triple which
may not make sense, e.g. riscv64-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without a target
triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead
of rejecting it outrightly.
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Switch to backwards scavenging in eliminateFrameIndex</title>
<updated>2023-06-07T19:59:05+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2023-05-16T16:07:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=5aea839ab3edeb58bb0eea833ad9427d0ae7ef67'/>
<id>5aea839ab3edeb58bb0eea833ad9427d0ae7ef67</id>
<content type='text'>
Frame index elimination runs backwards so we must use backwards
scavenging. Otherwise, when a scavenged register is spilled, the
scavenger will remember that the register is in use until the restore
point, but it will never reach that restore point. The result is that in
some cases it will keep scavenging different registers instead of
reusing the same one.

Differential Revision: https://reviews.llvm.org/D152394
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Frame index elimination runs backwards so we must use backwards
scavenging. Otherwise, when a scavenged register is spilled, the
scavenger will remember that the register is in use until the restore
point, but it will never reach that restore point. The result is that in
some cases it will keep scavenging different registers instead of
reusing the same one.

Differential Revision: https://reviews.llvm.org/D152394
</pre>
</div>
</content>
</entry>
</feed>
