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<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[AMDGPU,test] Change llc -march= to -mtriple= (#75982)</title>
<updated>2024-01-17T05:54:58+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2024-01-17T05:54:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9e9907f1cfa424366fba58d9520f9305b537cec9'/>
<id>9e9907f1cfa424366fba58d9520f9305b537cec9</id>
<content type='text'>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</content>
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<pre>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Convert some assorted tests to opaque pointers</title>
<updated>2022-12-02T02:40:30+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2022-12-02T02:33:26+00:00</published>
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<id>d85e849ff4d5e03ed83ee10e56074f238ba444d3</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[NFC] Removed unused prefixes in CodeGen/AMDGPU</title>
<updated>2021-01-06T18:32:44+00:00</updated>
<author>
<name>Mircea Trofin</name>
<email>mtrofin@google.com</email>
</author>
<published>2021-01-06T17:35:52+00:00</published>
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<id>90347ab96f25c913c832b86c69efa525db7bd039</id>
<content type='text'>
This covers tests starting with m-r.

Differential Revision: https://reviews.llvm.org/D94181
</content>
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<pre>
This covers tests starting with m-r.

Differential Revision: https://reviews.llvm.org/D94181
</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Switch scalarize global loads ON by default</title>
<updated>2017-07-04T17:32:00+00:00</updated>
<author>
<name>Alexander Timofeev</name>
<email>Alexander.Timofeev@amd.com</email>
</author>
<published>2017-07-04T17:32:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=982aee6a38ed7b416bfd2ba67f2144148251f733'/>
<id>982aee6a38ed7b416bfd2ba67f2144148251f733</id>
<content type='text'>
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307097
</content>
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<pre>
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307097
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"</title>
<updated>2017-07-04T02:14:18+00:00</updated>
<author>
<name>NAKAMURA Takumi</name>
<email>geek4civic@gmail.com</email>
</author>
<published>2017-07-04T02:14:18+00:00</published>
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<id>e4a741376bebf902e94f27e7be1636c0510b0f46</id>
<content type='text'>
It broke a testcase.

  Failing Tests (1):
      LLVM :: CodeGen/AMDGPU/alignbit-pat.ll

llvm-svn: 307054
</content>
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<pre>
It broke a testcase.

  Failing Tests (1):
      LLVM :: CodeGen/AMDGPU/alignbit-pat.ll

llvm-svn: 307054
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Switch scalarize global loads ON by default</title>
<updated>2017-07-03T14:54:11+00:00</updated>
<author>
<name>Alexander Timofeev</name>
<email>Alexander.Timofeev@amd.com</email>
</author>
<published>2017-07-03T14:54:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ea7f08bee53c696f75adfc099b6c8e7b58b1ebe3'/>
<id>ea7f08bee53c696f75adfc099b6c8e7b58b1ebe3</id>
<content type='text'>
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307026
</content>
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<pre>
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307026
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel</title>
<updated>2017-03-21T21:39:51+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2017-03-21T21:39:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3dbeefa978fb7e7b231b249f9cd90c67b9e83277'/>
<id>3dbeefa978fb7e7b231b249f9cd90c67b9e83277</id>
<content type='text'>
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

llvm-svn: 298444
</content>
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<pre>
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

llvm-svn: 298444
</pre>
</div>
</content>
</entry>
<entry>
<title>Enable FeatureFlatForGlobal on Volcanic Islands</title>
<updated>2017-01-24T22:02:15+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2017-01-24T22:02:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7aad8fd8f45e07d72e50792aec18c2b476bdd96e'/>
<id>7aad8fd8f45e07d72e50792aec18c2b476bdd96e</id>
<content type='text'>
This switches to the workaround that HSA defaults to
for the mesa path.

This should be applied to the 4.0 branch.

Patch by Vedran Miletić &lt;vedran@miletic.net&gt;

llvm-svn: 292982
</content>
<content type='xhtml'>
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<pre>
This switches to the workaround that HSA defaults to
for the mesa path.

This should be applied to the 4.0 branch.

Patch by Vedran Miletić &lt;vedran@miletic.net&gt;

llvm-svn: 292982
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU/SI: Assembler: Unify parsing/printing of operands.</title>
<updated>2016-04-29T09:02:30+00:00</updated>
<author>
<name>Nikolay Haustov</name>
<email>Nikolay.Haustov@amd.com</email>
</author>
<published>2016-04-29T09:02:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=4f672a34edfd8440a896d26c28b08ab1d52e5238'/>
<id>4f672a34edfd8440a896d26c28b08ab1d52e5238</id>
<content type='text'>
Summary:
The goal is for each operand type to have its own parse function and
at the same time share common code for tracking state as different
instruction types share operand types (e.g. glc/glc_flat, etc).

Introduce parseAMDGPUOperand which can parse any optional operand.
DPP and Clamp/OMod have custom handling for now. Sam also suggested
to have class hierarchy for operand types instead of table. This
can be done in separate change.

Remove parseVOP3OptionalOps, parseDS*OptionalOps, parseFlatOptionalOps,
parseMubufOptionalOps, parseDPPOptionalOps.
Reduce number of definitions of AsmOperand's and MatchClasses' by using common base class.
Rename AsmMatcher/InstPrinter methods accordingly.
Print immediate type when printing parsed immediate operand.
Use 'off' if offset/index register is unused instead of skipping it to make it more readable (also agreed with SP3).
Update tests.

Reviewers: tstellarAMD, SamWot, artem.tamazov

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19584

llvm-svn: 268015
</content>
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<pre>
Summary:
The goal is for each operand type to have its own parse function and
at the same time share common code for tracking state as different
instruction types share operand types (e.g. glc/glc_flat, etc).

Introduce parseAMDGPUOperand which can parse any optional operand.
DPP and Clamp/OMod have custom handling for now. Sam also suggested
to have class hierarchy for operand types instead of table. This
can be done in separate change.

Remove parseVOP3OptionalOps, parseDS*OptionalOps, parseFlatOptionalOps,
parseMubufOptionalOps, parseDPPOptionalOps.
Reduce number of definitions of AsmOperand's and MatchClasses' by using common base class.
Rename AsmMatcher/InstPrinter methods accordingly.
Print immediate type when printing parsed immediate operand.
Use 'off' if offset/index register is unused instead of skipping it to make it more readable (also agreed with SP3).
Update tests.

Reviewers: tstellarAMD, SamWot, artem.tamazov

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19584

llvm-svn: 268015
</pre>
</div>
</content>
</entry>
<entry>
<title>DAGCombiner: Relax alignment restriction when changing load type</title>
<updated>2016-04-22T20:21:36+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2016-04-22T20:21:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=629d12de70959f49f0b8f78eb9e6e217103a24c7'/>
<id>629d12de70959f49f0b8f78eb9e6e217103a24c7</id>
<content type='text'>
If the target allows the alignment, this should still be OK.

llvm-svn: 267209
</content>
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<pre>
If the target allows the alignment, this should still be OK.

llvm-svn: 267209
</pre>
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</content>
</entry>
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