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<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir, branch users/mingmingl-llvm/samplefdo-profile-format</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[AMDGPU] Avoid bundling a SCHED_BARRIER with memops (#153533)</title>
<updated>2025-08-27T22:09:27+00:00</updated>
<author>
<name>Yoonseo Choi</name>
<email>Yoonseo.Choi@amd.com</email>
</author>
<published>2025-08-27T22:09:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6a8c20549e72e239fa39c77af72f719c6f7f0c6d'/>
<id>6a8c20549e72e239fa39c77af72f719c6f7f0c6d</id>
<content type='text'>
Avoid bundling a SCHED_BARRIER with memops. Memops are still can be
bundled and a SCHED_BARRIER ends the bundle. (e.g. [load, load, ...
SCHED_BARRIER(exclusive from the bundle) ), This is to honor the
SCHED_BARRIERs maximally without intervention of bundling.

If a SCHED_BARRIER is placed in a bundle between memops, the
SCHED_BARRIER is not used during IGroupLPMutation in postra mi-sched
phase. In addition, bundling memory ops with in-between SCHED_BARRIER
can prevent that SCHED_BARRIER or any neighboring SCHED_BARRIER being
honored. As users already provided SCHED_BARRIER between memory ops,
don't bundle it together with memory ops. Bypassing any bundling in a
MBB with a SCHED_BARRIER removes all those problems occur.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Avoid bundling a SCHED_BARRIER with memops. Memops are still can be
bundled and a SCHED_BARRIER ends the bundle. (e.g. [load, load, ...
SCHED_BARRIER(exclusive from the bundle) ), This is to honor the
SCHED_BARRIERs maximally without intervention of bundling.

If a SCHED_BARRIER is placed in a bundle between memops, the
SCHED_BARRIER is not used during IGroupLPMutation in postra mi-sched
phase. In addition, bundling memory ops with in-between SCHED_BARRIER
can prevent that SCHED_BARRIER or any neighboring SCHED_BARRIER being
honored. As users already provided SCHED_BARRIER between memory ops,
don't bundle it together with memory ops. Bypassing any bundling in a
MBB with a SCHED_BARRIER removes all those problems occur.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)</title>
<updated>2025-08-13T02:41:44+00:00</updated>
<author>
<name>Shoreshen</name>
<email>372660931@qq.com</email>
</author>
<published>2025-08-13T02:41:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=db96363c0ace379147f333bf917e9050608c5083'/>
<id>db96363c0ace379147f333bf917e9050608c5083</id>
<content type='text'>
Cause:
1. `implicit_def` inside bundle does not count for define of reg in
machineinst verifier
2. Including `implicit_def` will cause relative reg not define, result
in `Bad machine code: Using an undefined physical register` in the
machineinst verifier

Fixes https://github.com/llvm/llvm-project/issues/139102

---------

Co-authored-by: Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</content>
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<pre>
Cause:
1. `implicit_def` inside bundle does not count for define of reg in
machineinst verifier
2. Including `implicit_def` will cause relative reg not define, result
in `Bad machine code: Using an undefined physical register` in the
machineinst verifier

Fixes https://github.com/llvm/llvm-project/issues/139102

---------

Co-authored-by: Matt Arsenault &lt;Matthew.Arsenault@amd.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][NewPM] Port SIPostRABundler to NPM (#123717)</title>
<updated>2025-02-21T10:35:58+00:00</updated>
<author>
<name>Akshat Oke</name>
<email>Akshat.Oke@amd.com</email>
</author>
<published>2025-02-21T10:35:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=bd16a87d05d33655a6f51f89fa4c5663c72c648e'/>
<id>bd16a87d05d33655a6f51f89fa4c5663c72c648e</id>
<content type='text'>
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU,test] Change llc -march= to -mtriple= (#75982)</title>
<updated>2024-01-17T05:54:58+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2024-01-17T05:54:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9e9907f1cfa424366fba58d9520f9305b537cec9'/>
<id>9e9907f1cfa424366fba58d9520f9305b537cec9</id>
<content type='text'>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.</title>
<updated>2022-11-14T15:36:18+00:00</updated>
<author>
<name>Ivan Kosarev</name>
<email>ivan.kosarev@amd.com</email>
</author>
<published>2022-11-14T12:37:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1b560e6ab7fc16c915bb054d3bffe5f77e08c3d5'/>
<id>1b560e6ab7fc16c915bb054d3bffe5f77e08c3d5</id>
<content type='text'>
Reviewed By: dp, arsenm

Differential Revision: https://reviews.llvm.org/D137783
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reviewed By: dp, arsenm

Differential Revision: https://reviews.llvm.org/D137783
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Regenerate MIR checks. NFC.</title>
<updated>2022-06-27T11:15:29+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2022-06-27T11:15:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8871c3c562690347d75190be758312d1f92a7db4'/>
<id>8871c3c562690347d75190be758312d1f92a7db4</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[MachineInstr] Don't include debug uses in bundle header (PR52817)</title>
<updated>2022-01-17T09:43:21+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2022-01-10T15:11:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=873a7ee7e454e2bda754ff6f3f24078c1f853bac'/>
<id>873a7ee7e454e2bda754ff6f3f24078c1f853bac</id>
<content type='text'>
Following the recommendation in
https://github.com/llvm/llvm-project/issues/52817#issuecomment-1007635426,
this excludes debug instructions when finalizing the bundle. As uses
in debug instructions don't have effects, they will no longer be
included in the BUNDLE header.

Fixes https://github.com/llvm/llvm-project/issues/52817.

Differential Revision: https://reviews.llvm.org/D116945
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Following the recommendation in
https://github.com/llvm/llvm-project/issues/52817#issuecomment-1007635426,
this excludes debug instructions when finalizing the bundle. As uses
in debug instructions don't have effects, they will no longer be
included in the BUNDLE header.

Fixes https://github.com/llvm/llvm-project/issues/52817.

Differential Revision: https://reviews.llvm.org/D116945
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Fix SIPostRABundler crash on null register used by dbg value</title>
<updated>2021-11-19T01:01:19+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2021-11-18T23:35:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f8e615462b4f1376674530cc55ab6b8993cec726'/>
<id>f8e615462b4f1376674530cc55ab6b8993cec726</id>
<content type='text'>
Recently we started generate DBG_VALUEs with $noreg operands.
This crashes SIPostRABundler, and it should not iterate these
registers anyway.

Fixes: SWDEV-311733

Differential Revision: https://reviews.llvm.org/D114202
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Recently we started generate DBG_VALUEs with $noreg operands.
This crashes SIPostRABundler, and it should not iterate these
registers anyway.

Fixes: SWDEV-311733

Differential Revision: https://reviews.llvm.org/D114202
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Regenerate postra-bundle-memops.mir checks. NFC.</title>
<updated>2021-11-18T23:51:10+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2021-11-18T23:47:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=24cc79b9efff5e1411a537307b719510e8d660f5'/>
<id>24cc79b9efff5e1411a537307b719510e8d660f5</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>CodeGen: Print/parse LLTs in MachineMemOperands</title>
<updated>2021-06-30T20:54:13+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2021-05-20T02:25:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=fae05692a36f9ebbd201d93c2a6b0f927564d7e6'/>
<id>fae05692a36f9ebbd201d93c2a6b0f927564d7e6</id>
<content type='text'>
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
</pre>
</div>
</content>
</entry>
</feed>
