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<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>AMDGPU: Replace undef with poison in tests using insertvalue (#130895)</title>
<updated>2025-03-12T09:11:11+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-03-12T09:11:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=5a0a2f8239d34332000009a05e7972f0303ac746'/>
<id>5a0a2f8239d34332000009a05e7972f0303ac746</id>
<content type='text'>
perl -p -i -e 's/insertvalue (.*) undef/insertvalue \1 poison/g'</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
perl -p -i -e 's/insertvalue (.*) undef/insertvalue \1 poison/g'</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU,test] Change llc -march= to -mtriple= (#75982)</title>
<updated>2024-01-17T05:54:58+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2024-01-17T05:54:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9e9907f1cfa424366fba58d9520f9305b537cec9'/>
<id>9e9907f1cfa424366fba58d9520f9305b537cec9</id>
<content type='text'>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Bulk update some intrinsic tests to opaque pointers</title>
<updated>2022-11-28T19:21:31+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2022-11-28T19:13:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ad386a886b16ad83a982c0eff3f80d8ae8888882'/>
<id>ad386a886b16ad83a982c0eff3f80d8ae8888882</id>
<content type='text'>
Done entirely with the script.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Done entirely with the script.
</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC] Removed unused prefixes from CodeGen/AMDGPU</title>
<updated>2021-01-06T17:34:11+00:00</updated>
<author>
<name>Mircea Trofin</name>
<email>mtrofin@google.com</email>
</author>
<published>2021-01-06T04:23:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=b47063091304410e77cf2e03913d9f093b3ef60d'/>
<id>b47063091304410e77cf2e03913d9f093b3ef60d</id>
<content type='text'>
All the 'l'-starting tests.

Differential Revision: https://reviews.llvm.org/D94151
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All the 'l'-starting tests.

Differential Revision: https://reviews.llvm.org/D94151
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[AMDGPU] Insert waitcnt after returning from call"</title>
<updated>2020-09-23T15:16:39+00:00</updated>
<author>
<name>Sebastian Neubauer</name>
<email>sebastian.neubauer@amd.com</email>
</author>
<published>2020-09-23T15:16:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a343b9b032772894a7e27fcd03ebec3c53faa5d9'/>
<id>a343b9b032772894a7e27fcd03ebec3c53faa5d9</id>
<content type='text'>
This reverts commit ca907bfb57d8ad3ec3bcc2cff2abab7b1b933af6.

According to michel.daenzer,
&gt; This completely broke the Mesa radeonsi driver on Navi 14. Xorg +
&gt; xterm come up with major corruption &amp; psychedelic colours.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit ca907bfb57d8ad3ec3bcc2cff2abab7b1b933af6.

According to michel.daenzer,
&gt; This completely broke the Mesa radeonsi driver on Navi 14. Xorg +
&gt; xterm come up with major corruption &amp; psychedelic colours.
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Insert waitcnt after returning from call</title>
<updated>2020-09-23T10:17:59+00:00</updated>
<author>
<name>Sebastian Neubauer</name>
<email>sebastian.neubauer@amd.com</email>
</author>
<published>2020-09-04T10:36:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ca907bfb57d8ad3ec3bcc2cff2abab7b1b933af6'/>
<id>ca907bfb57d8ad3ec3bcc2cff2abab7b1b933af6</id>
<content type='text'>
When memory operations are outstanding on function calls, either the
caller or the callee can insert a waitcnt to ensure that all reads are
finished.
Calls need some time to be executed, so if the callee inserts the
waitcnt, filling the instruction buffer and waiting for memory will be
interleaved, hiding some latency. This comes at the cost of having a
waitcnt inside functions that may not be needed as no memory operations
are outstanding.

For function calls, this is already implemented. The same principal
applies to returns: If the caller inserts a waitcnt after the call, the
callee does not have to wait and the return and memory operation can be
run in parallel.

This commit implements waiting in the caller after returning from a
function call.

Differential Revision: https://reviews.llvm.org/D87674
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When memory operations are outstanding on function calls, either the
caller or the callee can insert a waitcnt to ensure that all reads are
finished.
Calls need some time to be executed, so if the callee inserts the
waitcnt, filling the instruction buffer and waiting for memory will be
interleaved, hiding some latency. This comes at the cost of having a
waitcnt inside functions that may not be needed as no memory operations
are outstanding.

For function calls, this is already implemented. The same principal
applies to returns: If the caller inserts a waitcnt after the call, the
callee does not have to wait and the return and memory operation can be
run in parallel.

This commit implements waiting in the caller after returning from a
function call.

Differential Revision: https://reviews.llvm.org/D87674
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Correct behavior of f16 buffer loads</title>
<updated>2019-08-05T15:59:07+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2019-08-05T15:59:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=392239296993090fd49d7a665e933ffc52e2068a'/>
<id>392239296993090fd49d7a665e933ffc52e2068a</id>
<content type='text'>
Don't assume format loads for f16. Also fixes support for targets
without i16.

llvm-svn: 367879
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Don't assume format loads for f16. Also fixes support for targets
without i16.

llvm-svn: 367879
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Add buffer/load 8/16 bit overloaded intrinsics</title>
<updated>2019-03-19T16:07:00+00:00</updated>
<author>
<name>Ryan Taylor</name>
<email>rtayl@amd.com</email>
</author>
<published>2019-03-19T16:07:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=00e063ab92345a00fe89b27c857ceaa281077166'/>
<id>00e063ab92345a00fe89b27c857ceaa281077166</id>
<content type='text'>
Summary:
Add buffer store/load 8/16 overloaded intrinsics for buffer, raw_buffer and struct_buffer

Change-Id: I166a29f071b2ff4e4683fb0392564b1f223ac61d

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59265

llvm-svn: 356465
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Summary:
Add buffer store/load 8/16 overloaded intrinsics for buffer, raw_buffer and struct_buffer

Change-Id: I166a29f071b2ff4e4683fb0392564b1f223ac61d

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59265

llvm-svn: 356465
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Fix for negative offsets in buffer/tbuffer intrinsics</title>
<updated>2018-10-03T10:29:43+00:00</updated>
<author>
<name>Tim Renouf</name>
<email>tpr.llvm@botech.co.uk</email>
</author>
<published>2018-10-03T10:29:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a37679d67b0df3e265e872294f76d926791d8d6f'/>
<id>a37679d67b0df3e265e872294f76d926791d8d6f</id>
<content type='text'>
Summary:
The new buffer/tbuffer intrinsics handle an out-of-range immediate
offset by moving/adding offset&amp;-4096 to a vgpr, leaving an in-range
immediate offset, with a chance of the move/add being CSEd for similar
loads/stores.

However it turns out that a negative offset in a vgpr is illegal, even
if adding the immediate offset makes it legal again.

Therefore, this commit disables the offset&amp;-4096 thing if the offset is
negative.

Differential Revision: https://reviews.llvm.org/D52683

Change-Id: Ie02f0a74f240a138dc2a29d17cfbd9e350e4ed13
llvm-svn: 343672
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Summary:
The new buffer/tbuffer intrinsics handle an out-of-range immediate
offset by moving/adding offset&amp;-4096 to a vgpr, leaving an in-range
immediate offset, with a chance of the move/add being CSEd for similar
loads/stores.

However it turns out that a negative offset in a vgpr is illegal, even
if adding the immediate offset makes it legal again.

Therefore, this commit disables the offset&amp;-4096 thing if the offset is
negative.

Differential Revision: https://reviews.llvm.org/D52683

Change-Id: Ie02f0a74f240a138dc2a29d17cfbd9e350e4ed13
llvm-svn: 343672
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Allow int types for MUBUF vdata</title>
<updated>2018-08-21T11:08:12+00:00</updated>
<author>
<name>Tim Renouf</name>
<email>tpr.llvm@botech.co.uk</email>
</author>
<published>2018-08-21T11:08:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=bb5ee41ab41bf0db99c2cea4c16c7eaeb0339965'/>
<id>bb5ee41ab41bf0db99c2cea4c16c7eaeb0339965</id>
<content type='text'>
Summary:
Previously the new llvm.amdgcn.raw/struct.buffer.load/store intrinsics
only allowed float types for the data to be loaded or stored, which
sometimes meant the frontend needed to generate a bitcast. In this, the
new intrinsics copied the old buffer intrinsics.

This commit extends the new intrinsics to allow int types as well.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D50315

Change-Id: I8202af2d036455553681dcbb3d7d32ae273f8f85
llvm-svn: 340270
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Summary:
Previously the new llvm.amdgcn.raw/struct.buffer.load/store intrinsics
only allowed float types for the data to be loaded or stored, which
sometimes meant the frontend needed to generate a bitcast. In this, the
new intrinsics copied the old buffer intrinsics.

This commit extends the new intrinsics to allow int types as well.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D50315

Change-Id: I8202af2d036455553681dcbb3d7d32ae273f8f85
llvm-svn: 340270
</pre>
</div>
</content>
</entry>
</feed>
