llvm-project.git/llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll, branch users/nico/python-2 Unnamed repository; edit this file 'description' to name the repository. AMDGPU: Replace ptr addrspace(1) undefs with poison (#130900) 2025-03-13T01:25:02+00:00 Matt Arsenault Matthew.Arsenault@amd.com 2025-03-13T01:25:02+00:00 6705d812b8563ae02cad3f7125de7193c0128c20 Many tests use store to undef as a placeholder use, so just replace all of these with poison. 
Many tests use store to undef as a placeholder use, so just replace
all of these with poison.
 AMDGPU: Make frame index folding logic consistent with eliminateFrameIndex (#129633) 2025-03-05T03:09:30+00:00 Matt Arsenault Matthew.Arsenault@amd.com 2025-03-05T03:09:30+00:00 3e53aeae94cfe98486ae3186a3eb627b69b51b77 This adds handling of s_add_u32, which is handled and removes handling of s_or_b32 and s_and_b32, which are not. I was working on handling them in #102345, but need to finish that patch. This fixes a regression exposed by a3165398db0736588daedb07650195502592e567 where the final instruction would use two literals. 
This adds handling of s_add_u32, which is handled and removes handling of
s_or_b32 and s_and_b32, which are not. I was working on handling them
in #102345, but need to finish that patch. This fixes a regression
exposed by a3165398db0736588daedb07650195502592e567 where the
final instruction would use two literals.
 [AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711) 2024-07-26T07:42:24+00:00 Changpeng Fang changpeng.fang@amd.com 2024-07-26T07:42:24+00:00 a82032918cd445e5750e171f57d4f3d7096c021a They are no longer needed after the patch: [AMDGPU] Remove wavefrontsize feature from GFX10: https://github.com/llvm/llvm-project/pull/98400 The exception is when "target-features" are set to "+wavefrontsize32" or "+wavefrontsize64", we still need to remove a wavefrontsize feature before add a different one to make sure only one of them are present. 
They are no longer needed after the patch: [AMDGPU] Remove wavefrontsize
feature from GFX10: https://github.com/llvm/llvm-project/pull/98400
The exception is when "target-features" are set to "+wavefrontsize32" or
"+wavefrontsize64", we still need to remove a wavefrontsize feature
before add a different one to make sure only one of them are present.
 [AMDGPU] Don't fix the scavenge slot at offset 0 (#79136) 2024-02-09T08:20:25+00:00 Diana Picus Diana-Magda.Picus@amd.com 2024-02-09T08:20:25+00:00 bc6955f18ced3ca89d49bc28eeb58cd6d367e136 At the moment, the emergency spill slot is a fixed object for entry functions and chain functions, and a regular stack object otherwise. This patch adopts the latter behaviour for entry/chain functions too. It seems this was always the intention [1] and it will also save us a bit of stack space in cases where the first stack object has a large alignment. [1] https://github.com/llvm/llvm-project/commit/34c8b835b16fb3879f1b9770e91df21883356bb6 
At the moment, the emergency spill slot is a fixed object for entry
functions and chain functions, and a regular stack object otherwise.
This patch adopts the latter behaviour for entry/chain functions too. It
seems this was always the intention [1] and it will also save us a bit
of stack space in cases where the first stack object has a large
alignment.

[1]
https://github.com/llvm/llvm-project/commit/34c8b835b16fb3879f1b9770e91df21883356bb6
 [AMDGPU] Increase max scratch allocation for GFX12 (#77625) 2024-01-17T10:25:28+00:00 Jay Foad jay.foad@amd.com 2024-01-17T10:25:28+00:00 42b9ea841e2d9fe186b8892be713443b5f680565 






[AMDGPU] Add GFX10/GFX11 wave64 test coverage in huge-private-buffer.ll
2023-01-10T14:17:09+00:00

Jay Foad
jay.foad@amd.com

2023-01-10T14:13:16+00:00

e2e5d5923604db30089c551ba2f469d245887585












[AMDGPU] Convert some tests to opaque pointers (NFC)
2022-12-19T11:41:13+00:00

Nikita Popov
npopov@redhat.com

2022-12-19T11:39:01+00:00

bdf2fbba9cee60b4b260ff17e4f44c475c11e715












[AMDGPU] Add GFX11 to some tests with manual checks
2022-11-17T09:42:28+00:00

Jay Foad
jay.foad@amd.com

2022-11-16T14:37:27+00:00

898b18844cb37e6ffd28118b2d5775f24daa379b

Differential Revision: https://reviews.llvm.org/D138138





Differential Revision: https://reviews.llvm.org/D138138







[AMDGPU] gfx1010 core wave32 changes
2019-06-20T15:08:34+00:00

Stanislav Mekhanoshin
Stanislav.Mekhanoshin@amd.com

2019-06-20T15:08:34+00:00

0846c125f98ba6e1013b5acd1b161bd32b395bf8

Differential Revision: https://reviews.llvm.org/D63204

llvm-svn: 363934





Differential Revision: https://reviews.llvm.org/D63204

llvm-svn: 363934







AMDGPU: Correct maximum possible private allocation size
2019-05-23T19:38:14+00:00

Matt Arsenault
Matthew.Arsenault@amd.com

2019-05-23T19:38:14+00:00

5c714cbdd83166e10b27b8e5ea2700654da2e90b

We were assuming a much larger possible per-wave visible stack
allocation than is possible:

https://github.com/RadeonOpenCompute/ROCR-Runtime/blob/faa3ae51388517353afcdaf9c16621f879ef0a59/src/core/runtime/amd_gpu_agent.cpp#L70

Based on this, we can assume the high 15 bits of a frame index or sret
are 0. The frame index value is the per-lane offset, so the maximum
frame index value is MAX_WAVE_SCRATCH / wavesize.

Remove the corresponding subtarget feature and option that made
this configurable.

llvm-svn: 361541





We were assuming a much larger possible per-wave visible stack
allocation than is possible:

https://github.com/RadeonOpenCompute/ROCR-Runtime/blob/faa3ae51388517353afcdaf9c16621f879ef0a59/src/core/runtime/amd_gpu_agent.cpp#L70

Based on this, we can assume the high 15 bits of a frame index or sret
are 0. The frame index value is the per-lane offset, so the maximum
frame index value is MAX_WAVE_SCRATCH / wavesize.

Remove the corresponding subtarget feature and option that made
this configurable.

llvm-svn: 361541