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<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/fsub64.ll, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[AMDGPU,test] Change llc -march= to -mtriple= (#75982)</title>
<updated>2024-01-17T05:54:58+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2024-01-17T05:54:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9e9907f1cfa424366fba58d9520f9305b537cec9'/>
<id>9e9907f1cfa424366fba58d9520f9305b537cec9</id>
<content type='text'>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Convert some fp op tests to opaque issues</title>
<updated>2022-11-29T23:08:53+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2022-11-29T22:49:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=177ff42d8efe58f3d365eb9c10a8f261e2531314'/>
<id>177ff42d8efe58f3d365eb9c10a8f261e2531314</id>
<content type='text'>
fmax_legacy.ll had one test that produced "ptraddrspace(1)", since
somehow "i1addrspace(1)*" used to parse.
</content>
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<pre>
fmax_legacy.ll had one test that produced "ptraddrspace(1)", since
somehow "i1addrspace(1)*" used to parse.
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Switch scalarize global loads ON by default</title>
<updated>2017-07-04T17:32:00+00:00</updated>
<author>
<name>Alexander Timofeev</name>
<email>Alexander.Timofeev@amd.com</email>
</author>
<published>2017-07-04T17:32:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=982aee6a38ed7b416bfd2ba67f2144148251f733'/>
<id>982aee6a38ed7b416bfd2ba67f2144148251f733</id>
<content type='text'>
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307097
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307097
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"</title>
<updated>2017-07-04T02:14:18+00:00</updated>
<author>
<name>NAKAMURA Takumi</name>
<email>geek4civic@gmail.com</email>
</author>
<published>2017-07-04T02:14:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e4a741376bebf902e94f27e7be1636c0510b0f46'/>
<id>e4a741376bebf902e94f27e7be1636c0510b0f46</id>
<content type='text'>
It broke a testcase.

  Failing Tests (1):
      LLVM :: CodeGen/AMDGPU/alignbit-pat.ll

llvm-svn: 307054
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It broke a testcase.

  Failing Tests (1):
      LLVM :: CodeGen/AMDGPU/alignbit-pat.ll

llvm-svn: 307054
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Switch scalarize global loads ON by default</title>
<updated>2017-07-03T14:54:11+00:00</updated>
<author>
<name>Alexander Timofeev</name>
<email>Alexander.Timofeev@amd.com</email>
</author>
<published>2017-07-03T14:54:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ea7f08bee53c696f75adfc099b6c8e7b58b1ebe3'/>
<id>ea7f08bee53c696f75adfc099b6c8e7b58b1ebe3</id>
<content type='text'>
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307026
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307026
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Allow SDWA in instructions with immediates and SGPRs</title>
<updated>2017-05-30T16:49:24+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2017-05-30T16:49:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=56ea488d8b8c897599f13c9f9e8058cb36ff808f'/>
<id>56ea488d8b8c897599f13c9f9e8058cb36ff808f</id>
<content type='text'>
An encoding does not allow to use SDWA in an instruction with
scalar operands, either literals or SGPRs. That is however possible
to copy these operands into a VGPR first.

Several copies of the value are produced if multiple SDWA conversions
were done. To cleanup MachineLICM (to hoist copies out of loops),
MachineCSE (to remove duplicate copies) and SIFoldOperands (to replace
SGPR to VGPR copy with immediate copy right to the VGPR) runs are added
after the SDWA pass.

Differential Revision: https://reviews.llvm.org/D33583

llvm-svn: 304219
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
An encoding does not allow to use SDWA in an instruction with
scalar operands, either literals or SGPRs. That is however possible
to copy these operands into a VGPR first.

Several copies of the value are produced if multiple SDWA conversions
were done. To cleanup MachineLICM (to hoist copies out of loops),
MachineCSE (to remove duplicate copies) and SIFoldOperands (to replace
SGPR to VGPR copy with immediate copy right to the VGPR) runs are added
after the SDWA pass.

Differential Revision: https://reviews.llvm.org/D33583

llvm-svn: 304219
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel</title>
<updated>2017-03-21T21:39:51+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2017-03-21T21:39:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3dbeefa978fb7e7b231b249f9cd90c67b9e83277'/>
<id>3dbeefa978fb7e7b231b249f9cd90c67b9e83277</id>
<content type='text'>
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

llvm-svn: 298444
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

llvm-svn: 298444
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Support commuting with immediate in src0</title>
<updated>2016-09-08T17:19:29+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2016-09-08T17:19:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=bbb47da8a1c9303f2bd3eafbf71a522c850bae54'/>
<id>bbb47da8a1c9303f2bd3eafbf71a522c850bae54</id>
<content type='text'>
llvm-svn: 280970
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
llvm-svn: 280970
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Run SIFoldOperands after PeepholeOptimizer</title>
<updated>2016-04-14T21:58:24+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2016-04-14T21:58:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3d1c1deb04efe0022f11ebc18bb43d7341ba0c75'/>
<id>3d1c1deb04efe0022f11ebc18bb43d7341ba0c75</id>
<content type='text'>
PeepholeOptimizer cleans up redundant copies, which makes
the operand folding more effective.

shader-db stats:

Totals:
SGPRS: 34200 -&gt; 34336 (0.40 %)
VGPRS: 22118 -&gt; 21655 (-2.09 %)
Code Size: 632144 -&gt; 633460 (0.21 %) bytes
LDS: 11 -&gt; 11 (0.00 %) blocks
Scratch: 10240 -&gt; 11264 (10.00 %) bytes per wave
Max Waves: 8822 -&gt; 8918 (1.09 %)
Wait states: 0 -&gt; 0 (0.00 %)

Totals from affected shaders:
SGPRS: 7704 -&gt; 7840 (1.77 %)
VGPRS: 5169 -&gt; 4706 (-8.96 %)
Code Size: 234444 -&gt; 235760 (0.56 %) bytes
LDS: 2 -&gt; 2 (0.00 %) blocks
Scratch: 0 -&gt; 1024 (0.00 %) bytes per wave
Max Waves: 1188 -&gt; 1284 (8.08 %)
Wait states: 0 -&gt; 0 (0.00 %)

Increases:
SGPRS: 35 (0.01 %)
VGPRS: 1 (0.00 %)
Code Size: 59 (0.02 %)
LDS: 0 (0.00 %)
Scratch: 1 (0.00 %)
Max Waves: 48 (0.02 %)
Wait states: 0 (0.00 %)

Decreases:
SGPRS: 26 (0.01 %)
VGPRS: 54 (0.02 %)
Code Size: 68 (0.03 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)
Max Waves: 4 (0.00 %)
Wait states: 0 (0.00 %)

llvm-svn: 266378
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PeepholeOptimizer cleans up redundant copies, which makes
the operand folding more effective.

shader-db stats:

Totals:
SGPRS: 34200 -&gt; 34336 (0.40 %)
VGPRS: 22118 -&gt; 21655 (-2.09 %)
Code Size: 632144 -&gt; 633460 (0.21 %) bytes
LDS: 11 -&gt; 11 (0.00 %) blocks
Scratch: 10240 -&gt; 11264 (10.00 %) bytes per wave
Max Waves: 8822 -&gt; 8918 (1.09 %)
Wait states: 0 -&gt; 0 (0.00 %)

Totals from affected shaders:
SGPRS: 7704 -&gt; 7840 (1.77 %)
VGPRS: 5169 -&gt; 4706 (-8.96 %)
Code Size: 234444 -&gt; 235760 (0.56 %) bytes
LDS: 2 -&gt; 2 (0.00 %) blocks
Scratch: 0 -&gt; 1024 (0.00 %) bytes per wave
Max Waves: 1188 -&gt; 1284 (8.08 %)
Wait states: 0 -&gt; 0 (0.00 %)

Increases:
SGPRS: 35 (0.01 %)
VGPRS: 1 (0.00 %)
Code Size: 59 (0.02 %)
LDS: 0 (0.00 %)
Scratch: 1 (0.00 %)
Max Waves: 48 (0.02 %)
Wait states: 0 (0.00 %)

Decreases:
SGPRS: 26 (0.01 %)
VGPRS: 54 (0.02 %)
Code Size: 68 (0.03 %)
LDS: 0 (0.00 %)
Scratch: 0 (0.00 %)
Max Waves: 4 (0.00 %)
Wait states: 0 (0.00 %)

llvm-svn: 266378
</pre>
</div>
</content>
</entry>
<entry>
<title>R600 -&gt; AMDGPU rename</title>
<updated>2015-06-13T03:28:10+00:00</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2015-06-13T03:28:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=45bb48ea197fe496865387120c7c55b56f0717d6'/>
<id>45bb48ea197fe496865387120c7c55b56f0717d6</id>
<content type='text'>
llvm-svn: 239657
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
llvm-svn: 239657
</pre>
</div>
</content>
</entry>
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