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<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/calling-conventions.ll, branch users/mingmingl-llvm/samplefdo-profile-format</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[AMDGPU] Add few missing gfx1250 codegen tests. NFC (#155314)</title>
<updated>2025-08-25T22:22:33+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-08-25T22:22:33+00:00</published>
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<id>f3ea46a31b85756d93b38f2f0c41708706f30fc7</id>
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</pre>
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</entry>
<entry>
<title>[AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (#154211)</title>
<updated>2025-08-20T14:26:49+00:00</updated>
<author>
<name>Brox Chen</name>
<email>guochen2@amd.com</email>
</author>
<published>2025-08-20T14:26:49+00:00</published>
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<id>c50ed05cada308dea282e026cc782a9ea3ab0c29</id>
<content type='text'>
recreate this patch from
https://github.com/llvm/llvm-project/pull/153894

It seems ISel sliently ignore the `i64 = zext i16` with a chained
`reg_sequence` pattern and thus this is causing a selection failure in
hip test. Recreate a new patch with an alternative pattern, and added a
ll test global-extload-gfx11plus.ll</content>
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<pre>
recreate this patch from
https://github.com/llvm/llvm-project/pull/153894

It seems ISel sliently ignore the `i64 = zext i16` with a chained
`reg_sequence` pattern and thus this is causing a selection failure in
hip test. Recreate a new patch with an alternative pattern, and added a
ll test global-extload-gfx11plus.ll</pre>
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</content>
</entry>
<entry>
<title>Revert "[AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#1538… (#154163)</title>
<updated>2025-08-18T18:01:19+00:00</updated>
<author>
<name>Brox Chen</name>
<email>guochen2@amd.com</email>
</author>
<published>2025-08-18T18:01:19+00:00</published>
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<id>d49aab10bd424f67a0df0d70f653f8deeb498a16</id>
<content type='text'>
This reverts commit 7c53c6162bd43d952546a3ef7d019babd5244c29.

This patch hit an issue in hip test. revert and will reopen later</content>
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<pre>
This reverts commit 7c53c6162bd43d952546a3ef7d019babd5244c29.

This patch hit an issue in hip test. revert and will reopen later</pre>
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</entry>
<entry>
<title>[AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (#153894)</title>
<updated>2025-08-18T15:01:57+00:00</updated>
<author>
<name>Brox Chen</name>
<email>guochen2@amd.com</email>
</author>
<published>2025-08-18T15:01:57+00:00</published>
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<id>7c53c6162bd43d952546a3ef7d019babd5244c29</id>
<content type='text'>
Update true16 mode with zext patterns using vgpr16 for 16bit data types.
This stop isel from inserting invalid "vgpr32 = copy vgpr16"</content>
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Update true16 mode with zext patterns using vgpr16 for 16bit data types.
This stop isel from inserting invalid "vgpr32 = copy vgpr16"</pre>
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</entry>
<entry>
<title>[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMDGPU/*.ll` (#150024)</title>
<updated>2025-07-23T17:42:46+00:00</updated>
<author>
<name>Shilei Tian</name>
<email>i@tianshilei.me</email>
</author>
<published>2025-07-23T17:42:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=fc0653f31c2a153eaa87f7fe87bd5f1090c4c8ba'/>
<id>fc0653f31c2a153eaa87f7fe87bd5f1090c4c8ba</id>
<content type='text'>
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.</content>
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<pre>
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.</pre>
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</entry>
<entry>
<title>[AMDGPU][True16][Codegen] remove packed build_vector pattern from true16 (#148715)</title>
<updated>2025-07-18T16:55:11+00:00</updated>
<author>
<name>Brox Chen</name>
<email>guochen2@amd.com</email>
</author>
<published>2025-07-18T16:55:11+00:00</published>
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<id>5138b61a25f11eb8675d0031712c1ee6b4cb8be4</id>
<content type='text'>
Some of the packed build_vector use vgpr_32 for i16/f16/bf16. 

In gfx11, bf16 arithmetic get promoted to f32 and this is done via v2i16
pack. In true16 mode this v2i16 pack is selected to a
build_vector/v_lshlrev pattern which only accepts VGPR32. This causes
isel to insert an illegal copy "vgpr32 = copy vgpr16" between def and
use. In the end this illegal copy confuses cse pass and trigger wrong
code elimination.

Remove the packed build_vector pattern from true16. After removal, ISel
will use vgpr16 build_vector patterns instead.</content>
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<pre>
Some of the packed build_vector use vgpr_32 for i16/f16/bf16. 

In gfx11, bf16 arithmetic get promoted to f32 and this is done via v2i16
pack. In true16 mode this v2i16 pack is selected to a
build_vector/v_lshlrev pattern which only accepts VGPR32. This causes
isel to insert an illegal copy "vgpr32 = copy vgpr16" between def and
use. In the end this illegal copy confuses cse pass and trigger wrong
code elimination.

Remove the packed build_vector pattern from true16. After removal, ISel
will use vgpr16 build_vector patterns instead.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Do not promote uniform i16 operations to i32 in CGP (#140208)</title>
<updated>2025-05-16T08:31:03+00:00</updated>
<author>
<name>Pierre van Houtryve</name>
<email>pierre.vanhoutryve@amd.com</email>
</author>
<published>2025-05-16T08:31:03+00:00</published>
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<id>aacebaeab5448b4ef614aa8aca52ca210e451f79</id>
<content type='text'>
For the majority of cases, this is a neutral or positive change.
There are even testcases that greatly benefit from it, but some regressions are possible.
There is #140040 for GlobalISel that'd need to be fixed but it's only a one instruction regression and I think it can be fixed later.

Solves #64591</content>
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<pre>
For the majority of cases, this is a neutral or positive change.
There are even testcases that greatly benefit from it, but some regressions are possible.
There is #140040 for GlobalISel that'd need to be fixed but it's only a one instruction regression and I think it can be fixed later.

Solves #64591</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Fix UB in tests due to mismatched calling conventions (#137957)</title>
<updated>2025-05-06T16:31:27+00:00</updated>
<author>
<name>Manuel Carrasco</name>
<email>macarras@amd.com</email>
</author>
<published>2025-05-06T16:31:27+00:00</published>
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<id>6479e9bad371f19a36ed15c236defc301efc180f</id>
<content type='text'>
Fixes UB in tests due to mismatched CC (definition and callsite).</content>
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Fixes UB in tests due to mismatched CC (definition and callsite).</pre>
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</entry>
<entry>
<title>[AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (#135078)</title>
<updated>2025-04-23T17:06:52+00:00</updated>
<author>
<name>Brox Chen</name>
<email>guochen2@amd.com</email>
</author>
<published>2025-04-23T17:06:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6dbc01e8015816e904687c03f0ea8afac817781d'/>
<id>6dbc01e8015816e904687c03f0ea8afac817781d</id>
<content type='text'>
This is a NFC patch.

This patch run a bulk update on CodeGen tests that are impacted by the
true16 features. This patch applies:
1. duplicate GFX11plus runlines and apply them with
"+mattr=+real-true16" and "+mattr=-real-true16"
2. update the test with the update script

For some GISEL runlines, the current CodeGen do not fully support the
true16 version. Still update the runlines, but comment out the failing
one, and added a "FIXME-TRUE16" comment to that test for easier
tracking. These test will be fixed in the following patches.

This is in a transition state that we support both
"+real-true16/-real-true16" in our code base. We plan to move to
"+real-true16" as default, and finally remove "-real-true16" mode and
test lines.</content>
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<pre>
This is a NFC patch.

This patch run a bulk update on CodeGen tests that are impacted by the
true16 features. This patch applies:
1. duplicate GFX11plus runlines and apply them with
"+mattr=+real-true16" and "+mattr=-real-true16"
2. update the test with the update script

For some GISEL runlines, the current CodeGen do not fully support the
true16 version. Still update the runlines, but comment out the failing
one, and added a "FIXME-TRUE16" comment to that test for easier
tracking. These test will be fixed in the following patches.

This is in a transition state that we support both
"+real-true16/-real-true16" in our code base. We plan to move to
"+real-true16" as default, and finally remove "-real-true16" mode and
test lines.</pre>
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</content>
</entry>
<entry>
<title>AMDGPU: Replace ptr addrspace(1) undefs with poison (#130900)</title>
<updated>2025-03-13T01:25:02+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-03-13T01:25:02+00:00</published>
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<id>6705d812b8563ae02cad3f7125de7193c0128c20</id>
<content type='text'>
Many tests use store to undef as a placeholder use, so just replace
all of these with poison.</content>
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<pre>
Many tests use store to undef as a placeholder use, so just replace
all of these with poison.</pre>
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