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<title>llvm-project.git/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll, branch users/fmayer/spr/compiler-rt-ubsan-leave-bufferedstacktrace-uninit</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[AMDGPU] Enable `AAAddressSpace` in `AMDGPUAttributor` (#101593)</title>
<updated>2024-08-06T19:27:18+00:00</updated>
<author>
<name>Shilei Tian</name>
<email>i@tianshilei.me</email>
</author>
<published>2024-08-06T19:27:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a0afcbfb5dd1b65459324aed0a06aed36affa67a'/>
<id>a0afcbfb5dd1b65459324aed0a06aed36affa67a</id>
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<pre>
</pre>
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</entry>
<entry>
<title>AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)</title>
<updated>2024-03-21T08:54:06+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2024-03-21T08:54:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=b6b703b2dfc1d1ba45ebc64ed6b53a3a46f531f5'/>
<id>b6b703b2dfc1d1ba45ebc64ed6b53a3a46f531f5</id>
<content type='text'>
SIMachineFunctionInfo has a scan  of the function body for inline asm
which may use AGPRs, or callees in SIMachineFunctionInfo. Move this
into the attributor, so it actually works interprocedurally.
    
Could probably avoid most of the test churn if this bothered to avoid
adding this on subtargets without AGPRs. We should also probably
try to delete the MIR scan in usesAGPRs but it seems to be trickier
to eliminate.</content>
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<pre>
SIMachineFunctionInfo has a scan  of the function body for inline asm
which may use AGPRs, or callees in SIMachineFunctionInfo. Move this
into the attributor, so it actually works interprocedurally.
    
Could probably avoid most of the test churn if this bothered to avoid
adding this on subtargets without AGPRs. We should also probably
try to delete the MIR scan in usesAGPRs but it seems to be trickier
to eliminate.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)</title>
<updated>2024-03-06T14:51:48+00:00</updated>
<author>
<name>Emma Pilkington</name>
<email>emma.pilkington95@gmail.com</email>
</author>
<published>2024-03-06T14:51:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=4490003a22658dcd12527029b2c8682b63d8a9d6'/>
<id>4490003a22658dcd12527029b2c8682b63d8a9d6</id>
<content type='text'>
The previous name 'amdgpu_code_object_version', was misleading since
this is really a property of the HSA OS. The new spelling also matches
the asm directive I added in bc82cfb.</content>
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<pre>
The previous name 'amdgpu_code_object_version', was misleading since
this is really a property of the HSA OS. The new spelling also matches
the asm directive I added in bc82cfb.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU][NFC] Test autogenerated llc tests for COV5 (#74339)</title>
<updated>2023-12-12T09:05:13+00:00</updated>
<author>
<name>Saiyedul Islam</name>
<email>Saiyedul.Islam@amd.com</email>
</author>
<published>2023-12-12T09:05:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=777b6de7a416e8fdb1aae5d28412e8d6dcc4ab8e'/>
<id>777b6de7a416e8fdb1aae5d28412e8d6dcc4ab8e</id>
<content type='text'>
Regenerate a few llc tests to test for COV5 instead of the default ABI
version.</content>
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<pre>
Regenerate a few llc tests to test for COV5 instead of the default ABI
version.</pre>
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</content>
</entry>
<entry>
<title>AMDGPU: Port AMDGPUAttributor to new pass manager (#71349)</title>
<updated>2023-11-07T06:40:40+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2023-11-07T06:40:40+00:00</published>
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<id>d34a10a47d25103725174c62ed5e84e8ca380249</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>Revert "[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)" (#66060)</title>
<updated>2023-09-12T09:43:59+00:00</updated>
<author>
<name>Saiyedul Islam</name>
<email>Saiyedul.Islam@amd.com</email>
</author>
<published>2023-09-12T09:43:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=466a8149b369e24139934466ee0a1cc14ece1403'/>
<id>466a8149b369e24139934466ee0a1cc14ece1403</id>
<content type='text'>
This reverts commit 0a8d17e79b02a92814a2a788d79df1f54d70ec3e.</content>
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<pre>
This reverts commit 0a8d17e79b02a92814a2a788d79df1f54d70ec3e.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)</title>
<updated>2023-09-12T08:23:31+00:00</updated>
<author>
<name>Saiyedul Islam</name>
<email>Saiyedul.Islam@amd.com</email>
</author>
<published>2023-09-12T08:23:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=0a8d17e79b02a92814a2a788d79df1f54d70ec3e'/>
<id>0a8d17e79b02a92814a2a788d79df1f54d70ec3e</id>
<content type='text'>
Also update LIT tests and docs.
For more details, see
https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata

Reviewed By: arsenm, jhuber6

Github PR: #65410

Differential Revision: https://reviews.llvm.org/D129818</content>
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<pre>
Also update LIT tests and docs.
For more details, see
https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata

Reviewed By: arsenm, jhuber6

Github PR: #65410

Differential Revision: https://reviews.llvm.org/D129818</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Propagate amdgpu-waves-per-eu with attributor</title>
<updated>2023-06-16T19:04:08+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2021-09-13T21:19:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=b9c6d9e6c3b9fab632d2ee33ecce899fadcee456'/>
<id>b9c6d9e6c3b9fab632d2ee33ecce899fadcee456</id>
<content type='text'>
This will do a value range merging down the callgraph, unlike the
current pass which can only propagate values to undecorated functions
from a kernel.

This one is a bit weird due to the interaction with the implied range
from amdgpu-flat-workgroup-size. At the default group range of 1,1024,
the minimum implied bounds is 4 so this ends up introducing the
attribute on undecorated functions. We could probably simplify this by
ignoring it and propagating the raw values. The subtarget interaction
and the interaction with amdgpu-flat-workgroup-size only really clamp
invalid values (plus the lower bound doesn't seem to do anything as
far as I can tell anyway).
</content>
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<pre>
This will do a value range merging down the callgraph, unlike the
current pass which can only propagate values to undecorated functions
from a kernel.

This one is a bit weird due to the interaction with the implied range
from amdgpu-flat-workgroup-size. At the default group range of 1,1024,
the minimum implied bounds is 4 so this ends up introducing the
attribute on undecorated functions. We could probably simplify this by
ignoring it and propagating the raw values. The subtarget interaction
and the interaction with amdgpu-flat-workgroup-size only really clamp
invalid values (plus the lower bound doesn't seem to do anything as
far as I can tell anyway).
</pre>
</div>
</content>
</entry>
<entry>
<title>Re-land "[AMDGPU] Define data layout entries for buffers""</title>
<updated>2023-05-03T19:43:56+00:00</updated>
<author>
<name>Krzysztof Drewniak</name>
<email>Krzysztof.Drewniak@amd.com</email>
</author>
<published>2023-05-03T16:21:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f0415f2a456d54daaa231c228d2c9f4ef2ce9b89'/>
<id>f0415f2a456d54daaa231c228d2c9f4ef2ce9b89</id>
<content type='text'>
Re-land D145441 with data layout upgrade code fixed to not break OpenMP.

This reverts commit 3f2fbe92d0f40bcb46db7636db9ec3f7e7899b27.

Differential Revision: https://reviews.llvm.org/D149776
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<pre>
Re-land D145441 with data layout upgrade code fixed to not break OpenMP.

This reverts commit 3f2fbe92d0f40bcb46db7636db9ec3f7e7899b27.

Differential Revision: https://reviews.llvm.org/D149776
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[AMDGPU] Define data layout entries for buffers"</title>
<updated>2023-05-03T16:11:00+00:00</updated>
<author>
<name>Krzysztof Drewniak</name>
<email>Krzysztof.Drewniak@amd.com</email>
</author>
<published>2023-05-03T16:08:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3f2fbe92d0f40bcb46db7636db9ec3f7e7899b27'/>
<id>3f2fbe92d0f40bcb46db7636db9ec3f7e7899b27</id>
<content type='text'>
This reverts commit f9c1ede2543b37fabe9f2d8f8fed5073c475d850.

Differential Revision: https://reviews.llvm.org/D149758
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<pre>
This reverts commit f9c1ede2543b37fabe9f2d8f8fed5073c475d850.

Differential Revision: https://reviews.llvm.org/D149758
</pre>
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