llvm-project.git/llvm/lib/Transforms, branch users/nico/python-2

[LSR] Strip dead code (NFC) (#146109)

2025-07-03T12:37:08+00:00

Nested AddRec is already rejected by the handling in pushSCEV().

[VPlan] Don't convert VPWidenSelectRecipes to vp.select in EVL transform (#146695)

2025-07-03T10:50:25+00:00

createEVLRecipe tries to optimise recipes that use the header mask by
replacing them with their VP equivalents and setting the EVL, allowing
the mask to be removed.

However we currently also convert widened selects to vp.select even
though they don't necessarily use the header mask.

Unlike vp.merge a vp.select only makes the "unused" lanes past EVL
poison, so it's not needed for correctness.

In the same vein as #127180, this patch removes the transform for
VPWidenSelectRecipes and keeps them as plain select instructions to
allow for more optimisations.

RISCVVLOptimizer will still be able to optimise away any VL toggles and
we end up with better code generation across llvm-test-suite and SPEC
CPU 2017.

[VPlan] Remove redundant debug location setting in VPInterleaveRecipe::execute. nfc (#146670)

2025-07-03T07:52:45+00:00

Remove it since we already set debug loc in
VPBasicBlock::executeRecipes.

[VectorCombine] Scalarize extracts of ZExt if profitable. (#142976)

2025-07-03T07:49:32+00:00

Add a new scalarization transform that tries to convert extracts of a
vector ZExt to a set of scalar shift and mask operations. This can be
profitable if the cost of extracting is the same or higher than the cost
of 2 scalar ops. This is the case on AArch64 for example.

For AArch64,this shows up in a number of workloads, including av1aom,
gmsh, minizinc and astc-encoder.

PR: https://github.com/llvm/llvm-project/pull/142976

[VPlan] Early assert for unsupported interleaved access features. nfc (#146669)

2025-07-03T07:31:53+00:00

[msan] Fix "Add optional flag to improve instrumentation of disjoint OR (#145990)" (#146799)

2025-07-03T03:15:58+00:00

The "V1" and "V2" values were already NOT'ed, hence the calculation of disjoint OR in #145990 was incorrect. This patch fixes the issue, with some refactoring and renaming of variables.

[NFC] [MSAN] replace (void) with [[maybe_unused]] (#146617)

2025-07-02T19:14:45+00:00

The latter is preferred in the LLVM style guide.

[SimplifyCFG] Transform switch to select when common bits uniquely identify one case (#145233)

2025-07-02T16:16:12+00:00

Fix #141753 .

This patch introduces a new check, that tries to decide if the
conjunction of all the values uniquely identify the accepted values by
the switch.

[VectorCombine] Scalarize vector intrinsics with scalar arguments (#146530)

2025-07-02T15:48:53+00:00

Some intrinsics like llvm.abs or llvm.powi have a scalar argument even
when the overloaded type is a vector.
This patch handles these in scalarizeOpOrCmp to allow scalarizing them.

In the test the leftover vector powi isn't folded away to poison, this
should be fixed in a separate patch.

[InstCombine] Fix multi-use handling for multi-GEP rewrite (#146689)

2025-07-02T14:45:27+00:00

If we're expanding offsets for a chain of GEPs in RewriteGEPs mode, we
should also rewrite GEPs that have one-use themselves, but are kept
alive by a multi-use GEP later in the chain.

For the sake of simplicity, I've changed this to just skip the one-use
condition entirely (which will perform an unnecessary rewrite of a no
longer used GEP, but shouldn't otherwise matter).