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<title>llvm-project.git/llvm/lib/Transforms/Vectorize/VectorCombine.cpp, branch users/vitalybuka/spr/main.test</title>
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<entry>
<title>[VectorCombine] Fix trunc generated between PHINodes (#108228)</title>
<updated>2024-09-12T09:20:56+00:00</updated>
<author>
<name>Igor Kirillov</name>
<email>igor.kirillov@arm.com</email>
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<published>2024-09-12T09:20:56+00:00</published>
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<entry>
<title>[VectorCombine] Add foldShuffleOfIntrinsics. (#106502)</title>
<updated>2024-09-10T13:10:09+00:00</updated>
<author>
<name>Han-Kuan Chen</name>
<email>hankuan.chen@sifive.com</email>
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<published>2024-09-10T13:10:09+00:00</published>
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<entry>
<title>[VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (#104606)</title>
<updated>2024-09-10T09:09:03+00:00</updated>
<author>
<name>Igor Kirillov</name>
<email>igor.kirillov@arm.com</email>
</author>
<published>2024-09-10T09:09:03+00:00</published>
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Check that `binop(zext(value)`, other) is possible and profitable to transform
into: `zext(binop(value, trunc(other)))`.
When CPU architecture has illegal scalar type iX, but vector type &lt;N * iX&gt; is
legal, scalar expressions before vectorisation may be extended to a legal
type iY. This extension could result in underutilization of vector lanes,
as more lanes could be used at one instruction with the lower type.
Vectorisers may not always recognize opportunities for type shrinking, and
this patch aims to address that limitation.</content>
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Check that `binop(zext(value)`, other) is possible and profitable to transform
into: `zext(binop(value, trunc(other)))`.
When CPU architecture has illegal scalar type iX, but vector type &lt;N * iX&gt; is
legal, scalar expressions before vectorisation may be extended to a legal
type iY. This extension could result in underutilization of vector lanes,
as more lanes could be used at one instruction with the lower type.
Vectorisers may not always recognize opportunities for type shrinking, and
this patch aims to address that limitation.</pre>
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<entry>
<title>[llvm] Use llvm::is_contained (NFC) (#101855)</title>
<updated>2024-08-04T18:42:48+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-08-04T18:42:48+00:00</published>
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<entry>
<title>[Transforms] Construct SmallVector with ArrayRef (NFC) (#101851)</title>
<updated>2024-08-03T22:33:08+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-08-03T22:33:08+00:00</published>
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<entry>
<title>[vectorcombine] Pull sext/zext through reduce.or/and/xor (#99548)</title>
<updated>2024-07-18T20:56:40+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2024-07-18T20:56:40+00:00</published>
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This extends the existing foldTruncFromReductions transform to handle
sext and zext as well. This is only legal for the bitwise reductions
(and/or/xor) and not the arithmetic ones (add, mul). Use the same
costing decision to drive whether we do the transform.</content>
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This extends the existing foldTruncFromReductions transform to handle
sext and zext as well. This is only legal for the bitwise reductions
(and/or/xor) and not the arithmetic ones (add, mul). Use the same
costing decision to drive whether we do the transform.</pre>
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<entry>
<title>[VectorCombine] foldShuffleToIdentity - peek through bitcasts to see if they come from the same value to form identity sequence (#98334)</title>
<updated>2024-07-15T20:36:23+00:00</updated>
<author>
<name>Simon Pilgrim</name>
<email>llvm-dev@redking.me.uk</email>
</author>
<published>2024-07-15T20:36:23+00:00</published>
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Workaround until I can get #96884 fixed properly - when trying to find identity sequences, peek through any bitcasts to see if the values all came from the same source. We don't run CSE frequently enough to merge all the bitcasts that we end up with.</content>
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Workaround until I can get #96884 fixed properly - when trying to find identity sequences, peek through any bitcasts to see if the values all came from the same source. We don't run CSE frequently enough to merge all the bitcasts that we end up with.</pre>
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<entry>
<title>[VectorCombine] foldShuffleToIdentity - ensure casts have the same source type</title>
<updated>2024-07-09T12:10:11+00:00</updated>
<author>
<name>Simon Pilgrim</name>
<email>llvm-dev@redking.me.uk</email>
</author>
<published>2024-07-09T12:09:48+00:00</published>
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<entry>
<title>[VectorCombine] foldShuffleOfCastops - don't restrict to oneuse but compare total costs instead</title>
<updated>2024-07-08T13:57:51+00:00</updated>
<author>
<name>Simon Pilgrim</name>
<email>llvm-dev@redking.me.uk</email>
</author>
<published>2024-07-08T13:57:36+00:00</published>
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Some casts (especially bitcasts but others as well) are incredibly cheap (or free), so don't limit the shuffle(cast(x),cast(y)) -&gt; cast(shuffle(x,y)) to oneuse cases, but instead compare the total before/after costs of possibly repeating some casts.
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Some casts (especially bitcasts but others as well) are incredibly cheap (or free), so don't limit the shuffle(cast(x),cast(y)) -&gt; cast(shuffle(x,y)) to oneuse cases, but instead compare the total before/after costs of possibly repeating some casts.
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<entry>
<title>[VectorCombine] foldShuffleToIdentity - handle bitcasts with equal element counts (#97731)</title>
<updated>2024-07-05T08:47:42+00:00</updated>
<author>
<name>Simon Pilgrim</name>
<email>llvm-dev@redking.me.uk</email>
</author>
<published>2024-07-05T08:47:42+00:00</published>
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Basic initial patch for #96884 that just handles case where we bitcast between float/integers of the same element width</content>
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Basic initial patch for #96884 that just handles case where we bitcast between float/integers of the same element width</pre>
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