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<title>llvm-project.git/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[VPlan] Share PreservesUniformity logic between isSingleScalar and isUniformAcrossVFsAndUFs</title>
<updated>2025-11-22T22:11:01+00:00</updated>
<author>
<name>Florian Hahn</name>
<email>flo@fhahn.com</email>
</author>
<published>2025-11-22T22:11:00+00:00</published>
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<id>a2231af5ddafbc82c9d6ecc994690639958c6661</id>
<content type='text'>
Extract the PreservesUniformity logic from isSingleScalar into a shared
static helper function. Update isUniformAcrossVFsAndUFs to use this
logic for VPWidenRecipe and VPInstruction, so that any opcode that
preserves uniformity is considered uniform-across-vf-and-uf if its
operands are.

This unifies the uniformity checking logic and makes it easier to extend
in the future.

This should effectively by NFC currently.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Extract the PreservesUniformity logic from isSingleScalar into a shared
static helper function. Update isUniformAcrossVFsAndUFs to use this
logic for VPWidenRecipe and VPInstruction, so that any opcode that
preserves uniformity is considered uniform-across-vf-and-uf if its
operands are.

This unifies the uniformity checking logic and makes it easier to extend
in the future.

This should effectively by NFC currently.
</pre>
</div>
</content>
</entry>
<entry>
<title>[VPlan] Cast to VPIRMetadata in getMemoryLocation (NFC) (#169028)</title>
<updated>2025-11-21T14:23:17+00:00</updated>
<author>
<name>Ramkumar Ramachandra</name>
<email>ramkumar.ramachandra@codasip.com</email>
</author>
<published>2025-11-21T14:23:17+00:00</published>
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<id>b98f6a54f6ccff67d6eb1cfa25a3f3d919c8f6c9</id>
<content type='text'>
This allows us to strip an unnecessary TypeSwitch.</content>
<content type='xhtml'>
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<pre>
This allows us to strip an unnecessary TypeSwitch.</pre>
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</content>
</entry>
<entry>
<title>[VPlan] Hoist loads with invariant addresses using noalias metadata. (#166247)</title>
<updated>2025-11-18T09:35:48+00:00</updated>
<author>
<name>Florian Hahn</name>
<email>flo@fhahn.com</email>
</author>
<published>2025-11-18T09:35:48+00:00</published>
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<id>7c34848ae1405127a66abf10a963d8c7748f2e51</id>
<content type='text'>
This patch implements a transform to hoists single-scalar replicated
loads with invariant addresses out of the vector loop to the preheader
when scoped noalias metadata proves they cannot alias with any stores in
the loop.

This enables hosting of loads we can prove do not alias any stores in
the loop due to memory runtime checks added during vectorization.

PR: https://github.com/llvm/llvm-project/pull/166247</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch implements a transform to hoists single-scalar replicated
loads with invariant addresses out of the vector loop to the preheader
when scoped noalias metadata proves they cannot alias with any stores in
the loop.

This enables hosting of loads we can prove do not alias any stores in
the loop due to memory runtime checks added during vectorization.

PR: https://github.com/llvm/llvm-project/pull/166247</pre>
</div>
</content>
</entry>
<entry>
<title>[VPlan] Fix LastActiveLane assertion on scalar VF (#167897)</title>
<updated>2025-11-17T11:03:38+00:00</updated>
<author>
<name>Luke Lau</name>
<email>luke@igalia.com</email>
</author>
<published>2025-11-17T11:03:38+00:00</published>
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<id>4d4a60cde00539db5033dcbc289ed2ec37b9ad8b</id>
<content type='text'>
For a scalar only VPlan with tail folding, if it has a phi live out then
legalizeAndOptimizeInductions will scalarize the widened canonical IV
feeding into the header mask:

    &lt;x1&gt; vector loop: {
      vector.body:
        EMIT vp&lt;%4&gt; = CANONICAL-INDUCTION ir&lt;0&gt;, vp&lt;%index.next&gt;
        vp&lt;%5&gt; = SCALAR-STEPS vp&lt;%4&gt;, ir&lt;1&gt;, vp&lt;%0&gt;
        EMIT vp&lt;%6&gt; = icmp ule vp&lt;%5&gt;, vp&lt;%3&gt;
        EMIT vp&lt;%index.next&gt; = add nuw vp&lt;%4&gt;, vp&lt;%1&gt;
        EMIT branch-on-count vp&lt;%index.next&gt;, vp&lt;%2&gt;
      No successors
    }
    Successor(s): middle.block

    middle.block:
      EMIT vp&lt;%8&gt; = last-active-lane vp&lt;%6&gt;
      EMIT vp&lt;%9&gt; = extract-lane vp&lt;%8&gt;, vp&lt;%5&gt;
    Successor(s): ir-bb&lt;exit&gt;

The verifier complains about this but this should still generate the
correct last active lane, so this fixes the assert by handling this case
in isHeaderMask. There is a similar pattern already there for
ActiveLaneMask, which also expects a VPScalarIVSteps recipe.

Fixes #167813</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For a scalar only VPlan with tail folding, if it has a phi live out then
legalizeAndOptimizeInductions will scalarize the widened canonical IV
feeding into the header mask:

    &lt;x1&gt; vector loop: {
      vector.body:
        EMIT vp&lt;%4&gt; = CANONICAL-INDUCTION ir&lt;0&gt;, vp&lt;%index.next&gt;
        vp&lt;%5&gt; = SCALAR-STEPS vp&lt;%4&gt;, ir&lt;1&gt;, vp&lt;%0&gt;
        EMIT vp&lt;%6&gt; = icmp ule vp&lt;%5&gt;, vp&lt;%3&gt;
        EMIT vp&lt;%index.next&gt; = add nuw vp&lt;%4&gt;, vp&lt;%1&gt;
        EMIT branch-on-count vp&lt;%index.next&gt;, vp&lt;%2&gt;
      No successors
    }
    Successor(s): middle.block

    middle.block:
      EMIT vp&lt;%8&gt; = last-active-lane vp&lt;%6&gt;
      EMIT vp&lt;%9&gt; = extract-lane vp&lt;%8&gt;, vp&lt;%5&gt;
    Successor(s): ir-bb&lt;exit&gt;

The verifier complains about this but this should still generate the
correct last active lane, so this fixes the assert by handling this case
in isHeaderMask. There is a similar pattern already there for
ActiveLaneMask, which also expects a VPScalarIVSteps recipe.

Fixes #167813</pre>
</div>
</content>
</entry>
<entry>
<title>[VPlan] Support VPWidenIntOrFpInduction in getSCEVExprForVPValue. (NFCI)</title>
<updated>2025-11-15T13:35:11+00:00</updated>
<author>
<name>Florian Hahn</name>
<email>flo@fhahn.com</email>
</author>
<published>2025-11-15T13:35:10+00:00</published>
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<id>820daa5c1ed856f9edab68a4e471e5ce46cf61c4</id>
<content type='text'>
Construct SCEVs for VPWidenIntOrFpInductionRecipe analogous to
VPCanonicalInductionPHIRecipe: create an AddRec with start + step from
the recipe.

Currently the only impact should be computing more costs of replicating
stores directly in VPlan.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Construct SCEVs for VPWidenIntOrFpInductionRecipe analogous to
VPCanonicalInductionPHIRecipe: create an AddRec with start + step from
the recipe.

Currently the only impact should be computing more costs of replicating
stores directly in VPlan.
</pre>
</div>
</content>
</entry>
<entry>
<title>[VPlan] Rename onlyFirst(Lane|Part)Used (NFC) (#166562)</title>
<updated>2025-11-06T10:07:58+00:00</updated>
<author>
<name>Ramkumar Ramachandra</name>
<email>ramkumar.ramachandra@codasip.com</email>
</author>
<published>2025-11-06T10:07:58+00:00</published>
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<id>eab44600fb7e5fcdb5548d7c4c13d0f3de838ebe</id>
<content type='text'>
Rename onlyFirst(Lane|Part)Used to usesFirst(Lane|Part)Only, in line
with usesScalars, for clarity.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Rename onlyFirst(Lane|Part)Used to usesFirst(Lane|Part)Only, in line
with usesScalars, for clarity.</pre>
</div>
</content>
</entry>
<entry>
<title>[VPlan] Improve getOrCreateVPValueForSCEVExpr (NFC) (#165699)</title>
<updated>2025-11-03T06:44:30+00:00</updated>
<author>
<name>Ramkumar Ramachandra</name>
<email>ramkumar.ramachandra@codasip.com</email>
</author>
<published>2025-11-03T06:44:30+00:00</published>
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<id>912cc5f09892ab5b0f7f22180064cb4b9198d321</id>
<content type='text'>
Use early exit in getOrCreateVPValueForSCEVExpr.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use early exit in getOrCreateVPValueForSCEVExpr.</pre>
</div>
</content>
</entry>
<entry>
<title>[VPlan] Limit VPScalarIVSteps to step == 1 in getSCEVExprForVPValue.</title>
<updated>2025-10-31T02:22:56+00:00</updated>
<author>
<name>Florian Hahn</name>
<email>flo@fhahn.com</email>
</author>
<published>2025-10-31T02:22:55+00:00</published>
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<id>683b00bb50a12d6e15427bb316c25f4d38070148</id>
<content type='text'>
For now, just support VPScalarIVSteps with step == 1 in
getSCEVExprForVPValue. This fixes a crash when the step would be != 1.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For now, just support VPScalarIVSteps with step == 1 in
getSCEVExprForVPValue. This fixes a crash when the step would be != 1.
</pre>
</div>
</content>
</entry>
<entry>
<title>[VPlan] Extend getSCEVForVPV, use to compute VPReplicateRecipe cost. (#161276)</title>
<updated>2025-10-30T22:46:19+00:00</updated>
<author>
<name>Florian Hahn</name>
<email>flo@fhahn.com</email>
</author>
<published>2025-10-30T22:46:19+00:00</published>
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<id>b2d12d6f2ba60a2f5c76cf535e2b215443a9c221</id>
<content type='text'>
Update getSCEVExprForVPValue to handle more complex expressions, to use
it in VPReplicateRecipe::comptueCost.

In particular, it supports construction SCEV expressions for
GetElementPtr VPReplicateRecipes, with operands that are
VPScalarIVStepsRecipe, VPDerivedIVRecipe and VPCanonicalIVRecipe. If we
hit a sub-expression we don't support yet, we return
SCEVCouldNotCompute.

Note that the SCEV expression is valid VF = 1: we only support
construction AddRecs for VPCanonicalIVRecipe, which is an AddRec
starting at 0 and stepping by 1. The returned SCEV expressions could be
converted to a VF specific one, by rewriting the AddRecs to ones with
the appropriate step.

Note that the logic for constructing SCEVs for GetElementPtr was
directly ported from ScalarEvolution.cpp.

Another thing to note is that we construct SCEV expression purely by
looking at the operation of the recipe and its translated operands, w/o
accessing the underlying IR (the exception being getting the source
element type for GEPs).

PR: https://github.com/llvm/llvm-project/pull/161276</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update getSCEVExprForVPValue to handle more complex expressions, to use
it in VPReplicateRecipe::comptueCost.

In particular, it supports construction SCEV expressions for
GetElementPtr VPReplicateRecipes, with operands that are
VPScalarIVStepsRecipe, VPDerivedIVRecipe and VPCanonicalIVRecipe. If we
hit a sub-expression we don't support yet, we return
SCEVCouldNotCompute.

Note that the SCEV expression is valid VF = 1: we only support
construction AddRecs for VPCanonicalIVRecipe, which is an AddRec
starting at 0 and stepping by 1. The returned SCEV expressions could be
converted to a VF specific one, by rewriting the AddRecs to ones with
the appropriate step.

Note that the logic for constructing SCEVs for GetElementPtr was
directly ported from ScalarEvolution.cpp.

Another thing to note is that we construct SCEV expression purely by
looking at the operation of the recipe and its translated operands, w/o
accessing the underlying IR (the exception being getting the source
element type for GEPs).

PR: https://github.com/llvm/llvm-project/pull/161276</pre>
</div>
</content>
</entry>
<entry>
<title>[VPlan] Move isSingleScalar implementation to VPlanUtils.cpp (NFC)</title>
<updated>2025-10-25T20:56:03+00:00</updated>
<author>
<name>Florian Hahn</name>
<email>flo@fhahn.com</email>
</author>
<published>2025-10-25T20:56:03+00:00</published>
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<id>d020b2da5419ba6780e77b8543dad51df8fbcf0e</id>
<content type='text'>
Move the implementation of vputils::isSingleScalar to VPlanUtils.cpp to
enable code sharing.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move the implementation of vputils::isSingleScalar to VPlanUtils.cpp to
enable code sharing.
</pre>
</div>
</content>
</entry>
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