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<title>llvm-project.git/llvm/lib/TargetParser/TargetParser.cpp, branch users/mingmingl-llvm/annotator-backup</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[AMDGPU] Add gfx1251 subtarget (#159430)</title>
<updated>2025-09-17T20:02:02+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-09-17T20:02:02+00:00</published>
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<entry>
<title>[AMDGPU] Add missing bf16-pk-insts feature to gfx1250 (#159167)</title>
<updated>2025-09-16T20:58:40+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-09-16T20:58:40+00:00</published>
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<pre>
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<entry>
<title>[AMDGPU] More radical feature initialization refactoring (#155222)</title>
<updated>2025-08-27T08:21:14+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-08-27T08:21:14+00:00</published>
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Factoring in flang, just have a single fillAMDGPUFeatureMap
function doing it all as an external interface and returing
an error.</content>
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<pre>
Factoring in flang, just have a single fillAMDGPUFeatureMap
function doing it all as an external interface and returing
an error.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Refactor insertWaveSizeFeature (#154850)</title>
<updated>2025-08-27T07:30:15+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-08-27T07:30:15+00:00</published>
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If a wavefrontsize32 or wavefrontsize64 is the only possible value
insert it into feature list by default and use that value as an
indication that another wavefront size is not legal.</content>
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If a wavefrontsize32 or wavefrontsize64 is the only possible value
insert it into feature list by default and use that value as an
indication that another wavefront size is not legal.</pre>
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</content>
</entry>
<entry>
<title>[Clang][AMDGPU] Add builtins for some buffer resource atomics (#149216)</title>
<updated>2025-08-05T17:04:15+00:00</updated>
<author>
<name>zGoldthorpe</name>
<email>zgoldtho@ualberta.ca</email>
</author>
<published>2025-08-05T17:04:15+00:00</published>
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This patch exposes builtins for atomic `add`, `max`, and `min` operations that
operate over buffer resource pointers.</content>
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<pre>
This patch exposes builtins for atomic `add`, `max`, and `min` operations that
operate over buffer resource pointers.</pre>
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</content>
</entry>
<entry>
<title>[AMDGCNSPIRV][NFC] Add missing target features to AMDGCNSPIRV (#152057)</title>
<updated>2025-08-05T14:29:48+00:00</updated>
<author>
<name>Alex Voicu</name>
<email>alexandru.voicu@amd.com</email>
</author>
<published>2025-08-05T14:29:48+00:00</published>
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<id>06458fff874fb272d1d99c26293b9210ae1aad5f</id>
<content type='text'>
`gfx1250` bring-up omitted updating the `amdgcnspirv` feature list, this
fixes that oversight.</content>
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<pre>
`gfx1250` bring-up omitted updating the `amdgcnspirv` feature list, this
fixes that oversight.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] gfx1250 v_perm_pk16_* instructions (#151773)</title>
<updated>2025-08-02T03:12:35+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-08-02T03:12:35+00:00</published>
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</entry>
<entry>
<title>[AMDGPU] Add gfx1250 v_cvt_sr_pk_bf16_f32 instruction (#151385)</title>
<updated>2025-07-30T21:02:03+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-07-30T21:02:03+00:00</published>
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</pre>
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</entry>
<entry>
<title>[AMDGPU] gfx1250 vmem prefetch target intrinsics and builtins (#150466)</title>
<updated>2025-07-24T19:13:59+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-07-24T19:13:59+00:00</published>
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<entry>
<title>[AMDGPU] Add support for `v_tanh_f32` on gfx1250 (#149360)</title>
<updated>2025-07-17T19:42:35+00:00</updated>
<author>
<name>Shilei Tian</name>
<email>i@tianshilei.me</email>
</author>
<published>2025-07-17T19:42:35+00:00</published>
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Co-authored-by: Mekhanoshin, Stanislav &lt;Stanislav.Mekhanoshin@amd.com&gt;</content>
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Co-authored-by: Mekhanoshin, Stanislav &lt;Stanislav.Mekhanoshin@amd.com&gt;</pre>
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