llvm-project.git/llvm/lib/Target, branch users/nico/python-2

[X86] commuteSelect - update to use SDPatternMatch. NFC. (#146868)

2025-07-03T13:51:36+00:00

[RISCV] Remove unneeded blank line between the features for XAndesVBFHCvt and XAndesVPackFPH. NFC.

2025-07-03T11:27:28+00:00

[WebAssembly] Fold TargetGlobalAddress with added offset (#145829)

2025-07-03T10:01:36+00:00

Previously we only folded TargetGlobalAddresses into the memarg if they
were on their own, so this patch supports folding TargetGlobalAddresses
that are added to some other offset.

Previously we weren't able to do this because we didn't have nuw on the
add, but we can now that getelementptr has nuw and is plumbed through to
the add in 0564d0665b302d1c7861e03d2995612f46613a0f.

Fixes #61930

Revert "[win][aarch64] Always reserve frame pointers for Arm64 Windows" (#146836)

2025-07-03T09:03:48+00:00

Reverts llvm/llvm-project#146582

Due to failures on many of Linaro's Linux flang bots:
https://lab.llvm.org/buildbot/#/builders/17/builds/9292

```
******************** TEST 'Flang :: Semantics/windows.f90' FAILED ********************
Exit Code: 1
Command Output (stdout):
--
--- 
+++ 
@@ -0,0 +1,2 @@
expect at 6: User IDs do not exist on Windows. This function will always return 1
expect at 11: Group IDs do not exist on Windows. This function will always return 1
FAIL
--
Command Output (stderr):
--
RUN: at line 1 has no command after substitutions
"/usr/bin/python3.10" /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Semantics/test_errors.py /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Semantics/windows.f90 /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/stage1/bin/flang --target=aarch64-pc-windows-msvc -Werror # RUN: at line 2
+ /usr/bin/python3.10 /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Semantics/test_errors.py /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Semantics/windows.f90 /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/stage1/bin/flang --target=aarch64-pc-windows-msvc -Werror
--
```

[RISCV] Added the MIPS prefetch extensions for MIPS RV64 P8700. (#145647)

2025-07-03T08:59:10+00:00

the extension enabled with xmipscbop.

Please refer "MIPS RV64 P8700/P8700-F Multiprocessing System
Programmer’s Guide" for more info on the extension at
https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf

[RISCV] Use template version isInt instead. NFC.

2025-07-03T08:22:02+00:00

MCAsmBackend: Replace FKF_IsPCRel with isPCRel()

2025-07-03T07:51:20+00:00

[ARM] Add neon vector support for trunc

2025-07-03T06:41:13+00:00

As per #142559, this marks ftrunc as legal for Neon and upgrades the existing
arm.neon.vrintz intrinsics.

MCAsmBackend: Simplify shouldForceRelocation overrides

2025-07-03T06:30:36+00:00

MCAsmBackend: Merge addReloc into applyFixup (#146820)

2025-07-03T06:14:11+00:00

Follow-up to #141333. Relocation generation called both addReloc and
applyFixup, with the default addReloc invoking shouldForceRelocation,
resulting in three virtual calls. This approach was also inflexible, as
targets needing additional data required extending
`shouldForceRelocation` (see #73721, resolved by #141311).

This change integrates relocation handling into applyFixup, eliminating
two virtual calls. The prior default addReloc is renamed to
maybeAddReloc. Targets overriding addReloc now call their customized
addReloc implementation.