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<title>llvm-project.git/llvm/lib/Target/X86/X86Subtarget.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>Mips/X86: Use reportFatalUsageError for subtarget construction errors (#142028)</title>
<updated>2025-05-30T06:03:50+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-05-30T06:03:50+00:00</published>
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<entry>
<title>[CodeGen] Prune headers and move code out of line for build efficiency, NFC (#135622)</title>
<updated>2025-04-15T05:23:18+00:00</updated>
<author>
<name>Reid Kleckner</name>
<email>rnk@google.com</email>
</author>
<published>2025-04-15T05:23:18+00:00</published>
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I noticed these destructors taking time with -ftime-trace and moved some
of them for minor build efficiency improvements.

The main impact of moving destructors out of line is that it avoids
requiring container fields containing other types from being complete,
i.e. one can have uptr&lt;T&gt; or vector&lt;T&gt; as a field with an incomplete
type T, and that means we can reduce transitive includes, as with
LegalizerInfo.h.

Move expensive getDebugOperandsForReg template out-of-line. The
std::function instantiation shows up in time trace even if you don't use
the function.</content>
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I noticed these destructors taking time with -ftime-trace and moved some
of them for minor build efficiency improvements.

The main impact of moving destructors out of line is that it avoids
requiring container fields containing other types from being complete,
i.e. one can have uptr&lt;T&gt; or vector&lt;T&gt; as a field with an incomplete
type T, and that means we can reduce transitive includes, as with
LegalizerInfo.h.

Move expensive getDebugOperandsForReg template out-of-line. The
std::function instantiation shows up in time trace even if you don't use
the function.</pre>
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</content>
</entry>
<entry>
<title>[X86] Use a range-based for loop (NFC) (#103519)</title>
<updated>2024-08-14T04:56:11+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-08-14T04:56:11+00:00</published>
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<entry>
<title>[Driver,CodeGen] Report error when enabling 64-bit-only features on non-64-bit arch (#101151)</title>
<updated>2024-07-31T02:38:33+00:00</updated>
<author>
<name>Shengchen Kan</name>
<email>shengchen.kan@intel.com</email>
</author>
<published>2024-07-31T02:38:33+00:00</published>
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<id>fd6faee5b3b5a7c0e5e87aa0b5719a1a48159ea0</id>
<content type='text'>
In front-end, now we detect for `-mapx-features=/-mapxf` and `-muintr`,
which is aligned with GCC

https://gcc.gnu.org/bugzilla/attachment.cgi?id=58698&amp;action=diff

In backend, we just disable these 64-bit-only features silently, so that
there is no error for
`-march=native -m32` on APX-supported arch.

llvm-issue: https://github.com/llvm/llvm-project/issues/94810
GCC thread: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115978</content>
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In front-end, now we detect for `-mapx-features=/-mapxf` and `-muintr`,
which is aligned with GCC

https://gcc.gnu.org/bugzilla/attachment.cgi?id=58698&amp;action=diff

In backend, we just disable these 64-bit-only features silently, so that
there is no error for
`-march=native -m32` on APX-supported arch.

llvm-issue: https://github.com/llvm/llvm-project/issues/94810
GCC thread: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115978</pre>
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</entry>
<entry>
<title>Remove support for 3DNow!, both intrinsics and builtins. (#96246)</title>
<updated>2024-07-16T16:08:48+00:00</updated>
<author>
<name>James Y Knight</name>
<email>jyknight@google.com</email>
</author>
<published>2024-07-16T16:08:48+00:00</published>
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<content type='text'>
This set of instructions was only supported by AMD chips starting in
the K6-2 (introduced 1998), and before the "Bulldozer" family
(2011). They were never much used, as they were effectively superseded
by the more-widely-implemented SSE (first implemented on the AMD side
in Athlon XP in 2001).

This is being done as a predecessor towards general removal of MMX
register usage. Since there is almost no usage of the 3DNow!
intrinsics, and no modern hardware even implements them, simple
removal seems like the best option.

(Clang half originally uploaded in https://reviews.llvm.org/D94213)

Works towards issue #41665 and issue #98272.</content>
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This set of instructions was only supported by AMD chips starting in
the K6-2 (introduced 1998), and before the "Bulldozer" family
(2011). They were never much used, as they were effectively superseded
by the more-widely-implemented SSE (first implemented on the AMD side
in Athlon XP in 2001).

This is being done as a predecessor towards general removal of MMX
register usage. Since there is almost no usage of the 3DNow!
intrinsics, and no modern hardware even implements them, simple
removal seems like the best option.

(Clang half originally uploaded in https://reviews.llvm.org/D94213)

Works towards issue #41665 and issue #98272.</pre>
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</entry>
<entry>
<title>[IR] Don't include Module.h in Analysis.h (NFC) (#97023)</title>
<updated>2024-06-28T12:30:47+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2024-06-28T12:30:47+00:00</published>
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<id>4169338e75cdce73d34063532db598c95ee82ae4</id>
<content type='text'>
Replace it with a forward declaration instead. Analysis.h is pulled in
by all passes, but not all passes need to access the module.</content>
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Replace it with a forward declaration instead. Analysis.h is pulled in
by all passes, but not all passes need to access the module.</pre>
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</entry>
<entry>
<title>Revert "[X86] Use generic CPU tuning when tune-cpu is empty" (#93436)</title>
<updated>2024-05-27T03:35:21+00:00</updated>
<author>
<name>Phoebe Wang</name>
<email>phoebe.wang@intel.com</email>
</author>
<published>2024-05-27T03:35:21+00:00</published>
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Reverts llvm/llvm-project#83631

Using `HasX86_64` is incorrect.</content>
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Reverts llvm/llvm-project#83631

Using `HasX86_64` is incorrect.</pre>
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</entry>
<entry>
<title>[X86] Use generic CPU tuning when tune-cpu is empty (#83631)</title>
<updated>2024-05-27T01:39:12+00:00</updated>
<author>
<name>AtariDreams</name>
<email>gfunni234@gmail.com</email>
</author>
<published>2024-05-27T01:39:12+00:00</published>
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<entry>
<title>[NFC] Remove unused parameter from shouldAssumeDSOLocal()</title>
<updated>2024-03-11T19:48:17+00:00</updated>
<author>
<name>Arthur Eubanks</name>
<email>aeubanks@google.com</email>
</author>
<published>2024-03-11T19:47:48+00:00</published>
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<entry>
<title>[X86] Fix referencing local tagged globals</title>
<updated>2023-12-17T21:49:50+00:00</updated>
<author>
<name>Arthur Eubanks</name>
<email>aeubanks@google.com</email>
</author>
<published>2023-12-15T21:01:55+00:00</published>
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<id>68c976bf64f50fe9c16a335378a964c166851962</id>
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We should treat the medium code model like the small code model.
Classifying non-local references already properly handled this.
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We should treat the medium code model like the small code model.
Classifying non-local references already properly handled this.
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