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<title>llvm-project.git/llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[WebAssembly][NFC] Convert IsWasm64 instruction field to 'bit' from string</title>
<updated>2022-05-17T10:06:40+00:00</updated>
<author>
<name>Alex Bradbury</name>
<email>asb@igalia.com</email>
</author>
<published>2022-05-17T10:06:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8a23df89dadd336f42cde669de72a1ffe86bee83'/>
<id>8a23df89dadd336f42cde669de72a1ffe86bee83</id>
<content type='text'>
Extends the cleanup in D125713 to IsWasm64.

Differential Revision: https://reviews.llvm.org/D125714
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Extends the cleanup in D125713 to IsWasm64.

Differential Revision: https://reviews.llvm.org/D125714
</pre>
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</content>
</entry>
<entry>
<title>[WebAssembly][NFC] Convert StackBased instruction field to 'bit' from string</title>
<updated>2022-05-17T10:02:30+00:00</updated>
<author>
<name>Alex Bradbury</name>
<email>asb@igalia.com</email>
</author>
<published>2022-05-17T10:02:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=601ed0b605310cc13d7ca7235c261dc95c2ced44'/>
<id>601ed0b605310cc13d7ca7235c261dc95c2ced44</id>
<content type='text'>
This is (IMHO) cleaner and (objectively) more strongly typed than using strings.

A follow-on patch will do the same for IsWasm64.

Differential Revision: https://reviews.llvm.org/D125713
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<pre>
This is (IMHO) cleaner and (objectively) more strongly typed than using strings.

A follow-on patch will do the same for IsWasm64.

Differential Revision: https://reviews.llvm.org/D125713
</pre>
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</content>
</entry>
<entry>
<title>[WebAssembly] Added initial type checker to MC Assembler</title>
<updated>2021-07-09T21:07:25+00:00</updated>
<author>
<name>Wouter van Oortmerssen</name>
<email>aardappel@gmail.com</email>
</author>
<published>2021-06-07T19:10:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9647a6f719ee4b1c23eea7aef368c1dcd5317949'/>
<id>9647a6f719ee4b1c23eea7aef368c1dcd5317949</id>
<content type='text'>
This to protect against non-sensical instruction sequences being assembled,
which would either cause asserts/crashes further down, or a Wasm module being output that doesn't validate.

Unlike a validator, this type checker is able to give type-errors as part of the parsing process, which makes the assembler much friendlier to be used by humans writing manual input.

Because the MC system is single pass (instructions aren't even stored in MC format, they are directly output) the type checker has to be single pass as well, which means that from now on .globaltype and .functype decls must come before their use. An extra pass is added to Codegen to collect information for this purpose, since AsmPrinter is normally single pass / streaming as well, and would otherwise generate this information on the fly.

A `-no-type-check` flag was added to llvm-mc (and any other tools that take asm input) that surpresses type errors, as a quick escape hatch for tests that were not intended to be type correct.

This is a first version of the type checker that ignores control flow, i.e. it checks that types are correct along the linear path, but not the branch path. This will still catch most errors. Branch checking could be added in the future.

Differential Revision: https://reviews.llvm.org/D104945
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<pre>
This to protect against non-sensical instruction sequences being assembled,
which would either cause asserts/crashes further down, or a Wasm module being output that doesn't validate.

Unlike a validator, this type checker is able to give type-errors as part of the parsing process, which makes the assembler much friendlier to be used by humans writing manual input.

Because the MC system is single pass (instructions aren't even stored in MC format, they are directly output) the type checker has to be single pass as well, which means that from now on .globaltype and .functype decls must come before their use. An extra pass is added to Codegen to collect information for this purpose, since AsmPrinter is normally single pass / streaming as well, and would otherwise generate this information on the fly.

A `-no-type-check` flag was added to llvm-mc (and any other tools that take asm input) that surpresses type errors, as a quick escape hatch for tests that were not intended to be type correct.

This is a first version of the type checker that ignores control flow, i.e. it checks that types are correct along the linear path, but not the branch path. This will still catch most errors. Branch checking could be added in the future.

Differential Revision: https://reviews.llvm.org/D104945
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Adding 64-bit version of R_WASM_MEMORY_ADDR_* relocs</title>
<updated>2020-06-15T17:07:42+00:00</updated>
<author>
<name>Wouter van Oortmerssen</name>
<email>aardappel@gmail.com</email>
</author>
<published>2020-06-05T16:03:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3b29376e3fca4305ea470ee142cad1296103297b'/>
<id>3b29376e3fca4305ea470ee142cad1296103297b</id>
<content type='text'>
This adds 4 new reloc types.

A lot of code that previously assumed any memory or offset values could be contained in a uint32_t (and often truncated results from functions returning 64-bit values) have been upgraded to uint64_t. This is not comprehensive: it is only the values that come in contact with the new relocation values and their dependents.

A new tablegen mapping was added to automatically upgrade loads/stores in the assembler, which otherwise has no way to select for these instructions (since they are indentical other than for the offset immediate). It follows a similar technique to https://reviews.llvm.org/D53307

Differential Revision: https://reviews.llvm.org/D81704
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This adds 4 new reloc types.

A lot of code that previously assumed any memory or offset values could be contained in a uint32_t (and often truncated results from functions returning 64-bit values) have been upgraded to uint64_t. This is not comprehensive: it is only the values that come in contact with the new relocation values and their dependents.

A new tablegen mapping was added to automatically upgrade loads/stores in the assembler, which otherwise has no way to select for these instructions (since they are indentical other than for the offset immediate). It follows a similar technique to https://reviews.llvm.org/D53307

Differential Revision: https://reviews.llvm.org/D81704
</pre>
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</content>
</entry>
<entry>
<title>[WebAssembly] Make disassembler always emit most canonical name.</title>
<updated>2019-02-05T01:19:45+00:00</updated>
<author>
<name>Wouter van Oortmerssen</name>
<email>aardappel@gmail.com</email>
</author>
<published>2019-02-05T01:19:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1a91cb0402270a3ce77a9397abda655384d89a43'/>
<id>1a91cb0402270a3ce77a9397abda655384d89a43</id>
<content type='text'>
Summary:
There are a few instructions that all map to the same opcode, so
when disassembling, we have to pick one. That was just the first one
before (the except_ref variant in the case of "call"), now it is the
one marked as IsCanonical in tablegen, or failing that, the shortest
name (which is typically the "canonical" one).

Also introduced a canonical "end" instruction for this purpose.

Reviewers: dschuff, tlively

Subscribers: sbc100, jgravelle-google, aheejin, llvm-commits, sunfish

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57713

llvm-svn: 353131
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<pre>
Summary:
There are a few instructions that all map to the same opcode, so
when disassembling, we have to pick one. That was just the first one
before (the except_ref variant in the case of "call"), now it is the
one marked as IsCanonical in tablegen, or failing that, the shortest
name (which is typically the "canonical" one).

Also introduced a canonical "end" instruction for this purpose.

Reviewers: dschuff, tlively

Subscribers: sbc100, jgravelle-google, aheejin, llvm-commits, sunfish

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57713

llvm-svn: 353131
</pre>
</div>
</content>
</entry>
<entry>
<title>Update the file headers across all of the LLVM projects in the monorepo</title>
<updated>2019-01-19T08:50:56+00:00</updated>
<author>
<name>Chandler Carruth</name>
<email>chandlerc@gmail.com</email>
</author>
<published>2019-01-19T08:50:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=2946cd701067404b99c39fb29dc9c74bd7193eb3'/>
<id>2946cd701067404b99c39fb29dc9c74bd7193eb3</id>
<content type='text'>
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
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<pre>
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Massive instruction renaming</title>
<updated>2019-01-08T06:25:55+00:00</updated>
<author>
<name>Thomas Lively</name>
<email>tlively@google.com</email>
</author>
<published>2019-01-08T06:25:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6a87ddac9a056c9a7b75eb630908aa356d8a1028'/>
<id>6a87ddac9a056c9a7b75eb630908aa356d8a1028</id>
<content type='text'>
Summary:
An automated renaming of all the instructions listed at
https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329
as well as some similarly-named identifiers.

Reviewers: aheejin, dschuff, aardappel

Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D56338

llvm-svn: 350609
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<pre>
Summary:
An automated renaming of all the instructions listed at
https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329
as well as some similarly-named identifiers.

Reviewers: aheejin, dschuff, aardappel

Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D56338

llvm-svn: 350609
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly][NFC] Remove WebAssemblyStackifier TableGen backend</title>
<updated>2018-10-22T21:55:26+00:00</updated>
<author>
<name>Thomas Lively</name>
<email>tlively@google.com</email>
</author>
<published>2018-10-22T21:55:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c63b5fcb2a272bb98d4ff0d106e78faf9cf32644'/>
<id>c63b5fcb2a272bb98d4ff0d106e78faf9cf32644</id>
<content type='text'>
Summary:
Replace its functionality with a TableGen InstrInfo relational
instruction mapping. Although arguably more complex than the TableGen
backend, the relational mapping is a smaller maintenance burden than a
TableGen backend.

Reviewers: aardappel, aheejin, dschuff

Subscribers: mgorny, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53307

llvm-svn: 344962
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<pre>
Summary:
Replace its functionality with a TableGen InstrInfo relational
instruction mapping. Although arguably more complex than the TableGen
backend, the relational mapping is a smaller maintenance burden than a
TableGen backend.

Reviewers: aardappel, aheejin, dschuff

Subscribers: mgorny, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53307

llvm-svn: 344962
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS] (fixed)</title>
<updated>2018-10-11T20:21:22+00:00</updated>
<author>
<name>Thomas Lively</name>
<email>tlively@google.com</email>
</author>
<published>2018-10-11T20:21:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f04bed8e7962174b493ada683e272cd9eb0e8290'/>
<id>f04bed8e7962174b493ada683e272cd9eb0e8290</id>
<content type='text'>
llvm-svn: 344287
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llvm-svn: 344287
</pre>
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</entry>
<entry>
<title>[WebAssembly] Revert rL344180, which was breaking expensive checks</title>
<updated>2018-10-11T18:45:48+00:00</updated>
<author>
<name>Thomas Lively</name>
<email>tlively@google.com</email>
</author>
<published>2018-10-11T18:45:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ab37189f7eb05e427170f60902d1964cf9ee4c95'/>
<id>ab37189f7eb05e427170f60902d1964cf9ee4c95</id>
<content type='text'>
llvm-svn: 344280
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llvm-svn: 344280
</pre>
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