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<title>llvm-project.git/llvm/lib/Target/WebAssembly/WebAssemblyISD.def, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[WebAssembly] Autovec support for dot (#123207)</title>
<updated>2025-02-03T08:58:43+00:00</updated>
<author>
<name>Sam Parker</name>
<email>sam.parker@arm.com</email>
</author>
<published>2025-02-03T08:58:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=df2de1369571dafb65affc1063ce9f0d261206c7'/>
<id>df2de1369571dafb65affc1063ce9f0d261206c7</id>
<content type='text'>
Enable the use of partial.reduce.add that we can lower to dot or a tree
of (add (extmul_low_u, extmul_high_u)) for the unsigned case. We support
both v8i16 and v16i8 inputs.</content>
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<pre>
Enable the use of partial.reduce.add that we can lower to dot or a tree
of (add (extmul_low_u, extmul_high_u)) for the unsigned case. We support
both v8i16 and v16i8 inputs.</pre>
</div>
</content>
</entry>
<entry>
<title>[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)</title>
<updated>2024-12-21T02:29:51+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2024-12-21T02:29:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9ae92d70561bcc95a7f818920238e764253d9758'/>
<id>9ae92d70561bcc95a7f818920238e764253d9758</id>
<content type='text'>
With this change, targets are no longer required to put memory / strict-fp opcodes after special
`ISD::FIRST_TARGET_MEMORY_OPCODE`/`ISD::FIRST_TARGET_STRICTFP_OPCODE` markers.
This will also allow autogenerating `isTargetMemoryOpcode`/`isTargetStrictFPOpcode (#119709).

Pull Request: https://github.com/llvm/llvm-project/pull/119969
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<pre>
With this change, targets are no longer required to put memory / strict-fp opcodes after special
`ISD::FIRST_TARGET_MEMORY_OPCODE`/`ISD::FIRST_TARGET_STRICTFP_OPCODE` markers.
This will also allow autogenerating `isTargetMemoryOpcode`/`isTargetStrictFPOpcode (#119709).

Pull Request: https://github.com/llvm/llvm-project/pull/119969
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Protect memory.fill and memory.copy from zero-length ranges. (#112617)</title>
<updated>2024-10-24T21:13:58+00:00</updated>
<author>
<name>Dan Gohman</name>
<email>dev@sunfishcode.online</email>
</author>
<published>2024-10-24T21:13:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=118445841d4d50b57ea2892a18f0b656526f804d'/>
<id>118445841d4d50b57ea2892a18f0b656526f804d</id>
<content type='text'>
WebAssembly's `memory.fill` and `memory.copy` instructions trap if the
pointers are out of bounds, even if the length is zero. This is
different from LLVM, which expects that it can call `memcpy` on
arbitrary invalid pointers if the length is zero. To avoid spurious
traps, branch around `memory.fill` and `memory.copy` when the length is
zero.

---------

Co-authored-by: Heejin Ahn &lt;aheejin@gmail.com&gt;</content>
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<pre>
WebAssembly's `memory.fill` and `memory.copy` instructions trap if the
pointers are out of bounds, even if the length is zero. This is
different from LLVM, which expects that it can call `memcpy` on
arbitrary invalid pointers if the length is zero. To avoid spurious
traps, branch around `memory.fill` and `memory.copy` when the length is
zero.

---------

Co-authored-by: Heejin Ahn &lt;aheejin@gmail.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Implement the wide-arithmetic proposal (#111598)</title>
<updated>2024-10-23T18:39:58+00:00</updated>
<author>
<name>Alex Crichton</name>
<email>alex@alexcrichton.com</email>
</author>
<published>2024-10-23T18:39:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c2293b33ddc6c722178087d85b2b4312ea830d12'/>
<id>c2293b33ddc6c722178087d85b2b4312ea830d12</id>
<content type='text'>
This commit implements the [wide-arithmetic] proposal which has recently
reached phase 2 in the WebAssembly proposals process. The goal here is
to implement support in LLVM for emitting these instructions which are
gated behind a new feature flag by default. A new `wide-arithmetic`
feature flag is introduced which gates these four new instructions from
being emitted.

Emission of each instruction itself is relatively simple given LLVM's
preexisting lowering rules and infrastructure. The main gotcha is that
due to the multi-result nature of all of these instructions it needed
the lowerings to be implemented in C++ rather than in TableGen.

[wide-arithmetic]: https://github.com/WebAssembly/wide-arithmetic</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This commit implements the [wide-arithmetic] proposal which has recently
reached phase 2 in the WebAssembly proposals process. The goal here is
to implement support in LLVM for emitting these instructions which are
gated behind a new feature flag by default. A new `wide-arithmetic`
feature flag is introduced which gates these four new instructions from
being emitted.

Emission of each instruction itself is relatively simple given LLVM's
preexisting lowering rules and infrastructure. The main gotcha is that
due to the multi-result nature of all of these instructions it needed
the lowerings to be implemented in C++ rather than in TableGen.

[wide-arithmetic]: https://github.com/WebAssembly/wide-arithmetic</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Replace LOAD_SPLAT with SPLAT_VECTOR</title>
<updated>2023-01-04T15:07:47+00:00</updated>
<author>
<name>Luke Lau</name>
<email>luke@igalia.com</email>
</author>
<published>2022-12-12T19:53:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f841ad30d77eeb4c51663e68efefdb734c7a3d07'/>
<id>f841ad30d77eeb4c51663e68efefdb734c7a3d07</id>
<content type='text'>
Splats were selected by matching on uses of `build_vector` with
identical elements, but a while back a target independent node for
vector splatting was added.
This removes the WebAssembly specific LOAD_SPLAT intrinsic, and instead
makes SPLAT_VECTOR legal and adds patterns for splat loads.

Differential Revision: https://reviews.llvm.org/D139871
</content>
<content type='xhtml'>
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<pre>
Splats were selected by matching on uses of `build_vector` with
identical elements, but a while back a target independent node for
vector splatting was added.
This removes the WebAssembly specific LOAD_SPLAT intrinsic, and instead
makes SPLAT_VECTOR legal and adds patterns for splat loads.

Differential Revision: https://reviews.llvm.org/D139871
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Custom optimization for truncate</title>
<updated>2021-12-14T16:42:39+00:00</updated>
<author>
<name>Jing Bao</name>
<email>jing.bao@intel.com</email>
</author>
<published>2021-12-14T16:42:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=2a4a229d6dcceecbb8bab094b6880e2445a6e465'/>
<id>2a4a229d6dcceecbb8bab094b6880e2445a6e465</id>
<content type='text'>
When possible, optimize TRUNCATE to generate Wasm SIMD narrow
instructions (i16x8.narrow_i32x4_u, i8x16.narrow_i16x8_u), rather than generate
lots of extract_lane and replace_lane.

Closes #50350.
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When possible, optimize TRUNCATE to generate Wasm SIMD narrow
instructions (i16x8.narrow_i32x4_u, i8x16.narrow_i16x8_u), rather than generate
lots of extract_lane and replace_lane.

Closes #50350.
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Implementation of table.get/set for reftypes in LLVM IR</title>
<updated>2021-10-20T08:31:31+00:00</updated>
<author>
<name>Paulo Matos</name>
<email>pmatos@igalia.com</email>
</author>
<published>2021-10-07T10:10:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6d0c7bc17de85807c286f78571235b6658999faf'/>
<id>6d0c7bc17de85807c286f78571235b6658999faf</id>
<content type='text'>
This change implements new DAG nodes TABLE_GET/TABLE_SET, and lowering
methods for load and stores of reference types from IR arrays. These
global LLVM IR arrays represent tables at the Wasm level.

Differential Revision: https://reviews.llvm.org/D111154
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change implements new DAG nodes TABLE_GET/TABLE_SET, and lowering
methods for load and stores of reference types from IR arrays. These
global LLVM IR arrays represent tables at the Wasm level.

Differential Revision: https://reviews.llvm.org/D111154
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Rename WrapperPIC -&gt; WrapperREL. NFC</title>
<updated>2021-09-03T00:04:34+00:00</updated>
<author>
<name>Sam Clegg</name>
<email>sbc@chromium.org</email>
</author>
<published>2021-09-02T18:24:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c32884c482ca3a742afaaa883a369918bb2eeb3f'/>
<id>c32884c482ca3a742afaaa883a369918bb2eeb3f</id>
<content type='text'>
This ISD node/wrapper represents am address which is relative to a base
address and therefore lowers to `i32.const` rather than `global.get`.

Use this wrapper type for TLS-relative addresses, paving the way for the
non-REL wrapper to be used to external TLS address once those are
supported.

Differential Revision: https://reviews.llvm.org/D109179
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This ISD node/wrapper represents am address which is relative to a base
address and therefore lowers to `i32.const` rather than `global.get`.

Use this wrapper type for TLS-relative addresses, paving the way for the
non-REL wrapper to be used to external TLS address once those are
supported.

Differential Revision: https://reviews.llvm.org/D109179
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Make result of 'catch' inst variadic</title>
<updated>2021-08-04T21:05:33+00:00</updated>
<author>
<name>Heejin Ahn</name>
<email>aheejin@gmail.com</email>
</author>
<published>2021-08-02T02:37:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=31a71a393f65d9e07b5b0756fef9dd16690950ee'/>
<id>31a71a393f65d9e07b5b0756fef9dd16690950ee</id>
<content type='text'>
`catch` instruction can have any number of result values depending on
its tag, but so far we have only needed a single i32 return value for
C++ exception so the instruction was specified that way. But using the
instruction for SjLj handling requires multiple return values.

This makes `catch` instruction's results variadic and moves selection of
`throw` and `catch` instruction from ISelLowering to ISelDAGToDAG.
Moving `catch` to ISelDAGToDAG is necessary because I am not aware of
a good way to do instruction selection for variadic output instructions
in TableGen. This also moves `throw` because 1. `throw` and `catch`
share the same utility function and 2. there is really no reason we
should do that in ISelLowering in the first place. What we do is mostly
the same in both places, and moving them to ISelDAGToDAG allows us to
remove unnecessary mid-level nodes for `throw` and `catch` in
WebAssemblyISD.def and WebAssemblyInstrInfo.td.

This also adds handling for new `catch` instruction to AsmTypeCheck.

Reviewed By: dschuff, tlively

Differential Revision: https://reviews.llvm.org/D107423
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
`catch` instruction can have any number of result values depending on
its tag, but so far we have only needed a single i32 return value for
C++ exception so the instruction was specified that way. But using the
instruction for SjLj handling requires multiple return values.

This makes `catch` instruction's results variadic and moves selection of
`throw` and `catch` instruction from ISelLowering to ISelDAGToDAG.
Moving `catch` to ISelDAGToDAG is necessary because I am not aware of
a good way to do instruction selection for variadic output instructions
in TableGen. This also moves `throw` because 1. `throw` and `catch`
share the same utility function and 2. there is really no reason we
should do that in ISelLowering in the first place. What we do is mostly
the same in both places, and moving them to ISelDAGToDAG allows us to
remove unnecessary mid-level nodes for `throw` and `catch` in
WebAssemblyISD.def and WebAssemblyInstrInfo.td.

This also adds handling for new `catch` instruction to AsmTypeCheck.

Reviewed By: dschuff, tlively

Differential Revision: https://reviews.llvm.org/D107423
</pre>
</div>
</content>
</entry>
<entry>
<title>[WebAssembly] Implementation of global.get/set for reftypes in LLVM IR</title>
<updated>2021-07-22T20:07:24+00:00</updated>
<author>
<name>Paulo Matos</name>
<email>pmatos@igalia.com</email>
</author>
<published>2021-07-22T19:11:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=46667a10039b664b953eb70534c27627b35a267d'/>
<id>46667a10039b664b953eb70534c27627b35a267d</id>
<content type='text'>
Reland of 31859f896.

This change implements new DAG notes GLOBAL_GET/GLOBAL_SET, and
lowering methods for load and stores of reference types from IR
globals. Once the lowering creates the new nodes, tablegen pattern
matches those and converts them to Wasm global.get/set.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D104797
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reland of 31859f896.

This change implements new DAG notes GLOBAL_GET/GLOBAL_SET, and
lowering methods for load and stores of reference types from IR
globals. Once the lowering creates the new nodes, tablegen pattern
matches those and converts them to Wasm global.get/set.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D104797
</pre>
</div>
</content>
</entry>
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