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<title>llvm-project.git/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[NFC][LLVM][SystemZ] Cleanup pass initialization for SystemZ (#134450)</title>
<updated>2025-04-08T01:08:55+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-04-08T01:08:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=80fde75dc6c50a7d32f6dbfda9a6f2c24890b5cc'/>
<id>80fde75dc6c50a7d32f6dbfda9a6f2c24890b5cc</id>
<content type='text'>
- Remove calls to pass initialization from pass constructors.
- https://github.com/llvm/llvm-project/issues/111767</content>
<content type='xhtml'>
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<pre>
- Remove calls to pass initialization from pass constructors.
- https://github.com/llvm/llvm-project/issues/111767</pre>
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</content>
</entry>
<entry>
<title>[SystemZ, DebugInfo] Instrument SystemZ backend passes for Instr-Ref DebugInfo (#133061)</title>
<updated>2025-03-31T17:30:06+00:00</updated>
<author>
<name>Dominik Steenken</name>
<email>dost@de.ibm.com</email>
</author>
<published>2025-03-31T17:30:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e9a3ea2218b754a96be4f44240c3f8ee9cbd26c9'/>
<id>e9a3ea2218b754a96be4f44240c3f8ee9cbd26c9</id>
<content type='text'>
This PR instruments the optimization passes in the SystemZ backend with
calls to `MachineFunction::substituteDebugValuesForInst` where
instruction substitutions are made to instructions that may compute
tracked values.

Tests are also added for each of the substitutions that were inserted.
Details on the individual passes follow.

### systemz-copy-physregs
When a copy targets an access register, we redirect the copy via an
auxiliary register. This leads to the final result being written by a
newly inserted SAR instruction, rather than the original MI, so we need
to update the debug value tracking to account for this.

### systemz-long-branch
This pass relaxes relative branch instructions based on the actual
locations of blocks. Only one of the branch instructions qualifies for
debug value tracking: BRCT, i.e. branch-relative-on-count, which
subtracts 1 from a register and branches if the result is not zero. This
is relaxed into an add-immediate and a conditional branch, so any
`debug-instr-number` present must move to the add-immediate instruction.

### systemz-post-rewrite
This pass replaces `LOCRMux` and `SELRMux` pseudoinstructions with
either the real versions of those instructions, or with branching
programs that implement the intent of the Pseudo. In all these cases,
any `debug-instr-number` attached to the pseudo needs to be reallocated
to the appropriate instruction in the result, either LOCR, SELR, or a
COPY.

### systemz-elim-compare
Similar to systemz-long-branch, for this pass, only few substitutions
are necessary, since it mainly deals with conditional branch
instructions. The only exceptiona are again branch-relative-on-count, as
it modifies a counter as part of the instruction, as well as any of the
load instructions that are affected.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This PR instruments the optimization passes in the SystemZ backend with
calls to `MachineFunction::substituteDebugValuesForInst` where
instruction substitutions are made to instructions that may compute
tracked values.

Tests are also added for each of the substitutions that were inserted.
Details on the individual passes follow.

### systemz-copy-physregs
When a copy targets an access register, we redirect the copy via an
auxiliary register. This leads to the final result being written by a
newly inserted SAR instruction, rather than the original MI, so we need
to update the debug value tracking to account for this.

### systemz-long-branch
This pass relaxes relative branch instructions based on the actual
locations of blocks. Only one of the branch instructions qualifies for
debug value tracking: BRCT, i.e. branch-relative-on-count, which
subtracts 1 from a register and branches if the result is not zero. This
is relaxed into an add-immediate and a conditional branch, so any
`debug-instr-number` present must move to the add-immediate instruction.

### systemz-post-rewrite
This pass replaces `LOCRMux` and `SELRMux` pseudoinstructions with
either the real versions of those instructions, or with branching
programs that implement the intent of the Pseudo. In all these cases,
any `debug-instr-number` attached to the pseudo needs to be reallocated
to the appropriate instruction in the result, either LOCR, SELR, or a
COPY.

### systemz-elim-compare
Similar to systemz-long-branch, for this pass, only few substitutions
are necessary, since it mainly deals with conditional branch
instructions. The only exceptiona are again branch-relative-on-count, as
it modifies a counter as part of the instruction, as well as any of the
load instructions that are affected.</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] Fix regstate of SELRMux operand in selectSLRMux(). (#128555)</title>
<updated>2025-02-28T14:03:04+00:00</updated>
<author>
<name>Jonas Paulsson</name>
<email>paulson1@linux.ibm.com</email>
</author>
<published>2025-02-28T14:03:04+00:00</published>
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<id>c298f71ea6fd2965e1768307496ee3aa0c40fd07</id>
<content type='text'>
It seems that there can be other cases with this that also can lead to
wrong code (discovered with csmith). This time it involved not the kill
flag but the undef flag.

Use the intersection of the flags from both MachineOperand:s instead
of the RegState from just one of them.
</content>
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<pre>
It seems that there can be other cases with this that also can lead to
wrong code (discovered with csmith). This time it involved not the kill
flag but the undef flag.

Use the intersection of the flags from both MachineOperand:s instead
of the RegState from just one of them.
</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] Replace SELRMux with COPY in case of identical operands. (#125108)</title>
<updated>2025-01-31T12:58:01+00:00</updated>
<author>
<name>Jonas Paulsson</name>
<email>paulson1@linux.ibm.com</email>
</author>
<published>2025-01-31T12:58:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=eb1a571114a799f532a12b2f062746d3b92fed88'/>
<id>eb1a571114a799f532a12b2f062746d3b92fed88</id>
<content type='text'>
If both operands of a SELRMux use the same register which is killed, and
the SELRMux is expanded to a jump sequence, a broken MIR results if the
kill flag is not removed. 

This patch replaces the SELRMux with a COPY in these cases.</content>
<content type='xhtml'>
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<pre>
If both operands of a SELRMux use the same register which is killed, and
the SELRMux is expanded to a jump sequence, a broken MIR results if the
kill flag is not removed. 

This patch replaces the SELRMux with a COPY in these cases.</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)"</title>
<updated>2024-05-27T06:29:24+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2024-05-27T06:29:24+00:00</published>
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<id>af16d49bb25ad446ee4b243fbd8ca2bc9ac3f8b9</id>
<content type='text'>
This reverts commit 558c51968f8f8252128f38a2b860c9ae0a86edba.

PR merged without review.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit 558c51968f8f8252128f38a2b860c9ae0a86edba.

PR merged without review.
</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)</title>
<updated>2024-05-26T23:54:53+00:00</updated>
<author>
<name>AtariDreams</name>
<email>gfunni234@gmail.com</email>
</author>
<published>2024-05-26T23:54:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=558c51968f8f8252128f38a2b860c9ae0a86edba'/>
<id>558c51968f8f8252128f38a2b860c9ae0a86edba</id>
<content type='text'>
More conversions from LivePhysRegs to LiveRegUnits</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
More conversions from LivePhysRegs to LiveRegUnits</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] Remove unnecessary casts to SystemZInstrInfo (NFC).</title>
<updated>2022-06-20T12:52:06+00:00</updated>
<author>
<name>Jonas Paulsson</name>
<email>paulsson@linux.vnet.ibm.com</email>
</author>
<published>2022-06-20T12:20:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3432d40c7fa4229ab810845c88fabcb8c9b20aa0'/>
<id>3432d40c7fa4229ab810845c88fabcb8c9b20aa0</id>
<content type='text'>
Review: Ulrich Weigand
</content>
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<pre>
Review: Ulrich Weigand
</pre>
</div>
</content>
</entry>
<entry>
<title>Cleanup codegen includes</title>
<updated>2022-03-16T07:43:00+00:00</updated>
<author>
<name>serge-sans-paille</name>
<email>sguelton@redhat.com</email>
</author>
<published>2022-03-15T09:54:19+00:00</published>
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<id>989f1c72e0f4236ac35a35cc9998ea34bc62d5cd</id>
<content type='text'>
This is a (fixed) recommit of https://reviews.llvm.org/D121169

after:  1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a (fixed) recommit of https://reviews.llvm.org/D121169

after:  1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "Cleanup codegen includes"</title>
<updated>2022-03-10T12:59:22+00:00</updated>
<author>
<name>Nico Weber</name>
<email>thakis@chromium.org</email>
</author>
<published>2022-03-10T12:54:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a278250b0f85949d4f98e641786e5eb2b540c6b0'/>
<id>a278250b0f85949d4f98e641786e5eb2b540c6b0</id>
<content type='text'>
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169
</pre>
</div>
</content>
</entry>
<entry>
<title>Cleanup codegen includes</title>
<updated>2022-03-10T09:00:30+00:00</updated>
<author>
<name>serge-sans-paille</name>
<email>sguelton@redhat.com</email>
</author>
<published>2022-03-07T23:25:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7f230feeeac8a67b335f52bd2e900a05c6098f20'/>
<id>7f230feeeac8a67b335f52bd2e900a05c6098f20</id>
<content type='text'>
after:  1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
after:  1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169
</pre>
</div>
</content>
</entry>
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