<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm-project.git/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>CodeGen: Remove TRI arguments from stack load/store hooks (#158240)</title>
<updated>2025-11-11T00:24:39+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-11-11T00:24:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1f3f522866ae483836cd39c13695a0ab41b547d5'/>
<id>1f3f522866ae483836cd39c13695a0ab41b547d5</id>
<content type='text'>
This is directly available in TargetInstrInfo</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is directly available in TargetInstrInfo</pre>
</div>
</content>
</entry>
<entry>
<title>CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo (#158224)</title>
<updated>2025-11-10T22:40:39+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-11-10T22:40:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=11ab23c33db5c990489023c91260435db288efd8'/>
<id>11ab23c33db5c990489023c91260435db288efd8</id>
<content type='text'>
Both conceptually belong to the same subtarget, so it should not
be necessary to pass in the context TargetRegisterInfo to any
TargetInstrInfo member. Add this reference so those superfluous
arguments can be removed.

Most targets placed their TargetRegisterInfo as a member
in TargetInstrInfo. A few had this owned by the TargetSubtargetInfo,
so unify all targets to look the same.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Both conceptually belong to the same subtarget, so it should not
be necessary to pass in the context TargetRegisterInfo to any
TargetInstrInfo member. Add this reference so those superfluous
arguments can be removed.

Most targets placed their TargetRegisterInfo as a member
in TargetInstrInfo. A few had this owned by the TargetSubtargetInfo,
so unify all targets to look the same.</pre>
</div>
</content>
</entry>
<entry>
<title>CodeGen: Pass SubtargetInfo to TargetGenInstrInfo constructors (#157337)</title>
<updated>2025-09-08T03:12:19+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-09-08T03:12:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=727e9f5ea5b2bb9d2fa37619ad2f19b21af7ce4d'/>
<id>727e9f5ea5b2bb9d2fa37619ad2f19b21af7ce4d</id>
<content type='text'>
This will make it possible for tablegen to make subtarget
dependent decisions without adding new arguments to every
target.

---------

Co-authored-by: Sergei Barannikov &lt;barannikov88@gmail.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This will make it possible for tablegen to make subtarget
dependent decisions without adding new arguments to every
target.

---------

Co-authored-by: Sergei Barannikov &lt;barannikov88@gmail.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>[Target] Remove unnecessary casts (NFC) (#151902)</title>
<updated>2025-08-04T14:40:19+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-08-04T14:40:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9559de180336ec542bc9c49da9f2800fa3ea5004'/>
<id>9559de180336ec542bc9c49da9f2800fa3ea5004</id>
<content type='text'>
getImm() already returns int64_t.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
getImm() already returns int64_t.</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] Fix warnings</title>
<updated>2025-04-16T18:25:55+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-04-16T18:25:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8a00efd26db21ef73df58b465b7741d1f889a681'/>
<id>8a00efd26db21ef73df58b465b7741d1f889a681</id>
<content type='text'>
This patch fixes:

  llvm/lib/Target/SystemZ/SystemZISelLowering.cpp:6916:7: error:
  unused variable 'RegVT' [-Werror,-Wunused-variable]

  llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp:1265:30: error: unused
  variable 'RC' [-Werror,-Wunused-variable]
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch fixes:

  llvm/lib/Target/SystemZ/SystemZISelLowering.cpp:6916:7: error:
  unused variable 'RegVT' [-Werror,-Wunused-variable]

  llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp:1265:30: error: unused
  variable 'RC' [-Werror,-Wunused-variable]
</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] Add support for 16-bit floating point. (#109164)</title>
<updated>2025-04-16T18:02:56+00:00</updated>
<author>
<name>Jonas Paulsson</name>
<email>paulson1@linux.ibm.com</email>
</author>
<published>2025-04-16T18:02:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6d03f51f0c59171f1ec3c5cc5c1fe71c30956273'/>
<id>6d03f51f0c59171f1ec3c5cc5c1fe71c30956273</id>
<content type='text'>
- _Float16 is now accepted by Clang.

- The half IR type is fully handled by the backend.

- These values are passed in FP registers and converted to/from float around
  each operation.

- Compiler-rt conversion functions are now built for s390x including the missing
  extendhfdf2 which was added.

Fixes #50374</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- _Float16 is now accepted by Clang.

- The half IR type is fully handled by the backend.

- These values are passed in FP registers and converted to/from float around
  each operation.

- Compiler-rt conversion functions are now built for s390x including the missing
  extendhfdf2 which was added.

Fixes #50374</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] Remove custom implementation of optimizeLoadInst [NFC] (#133123)</title>
<updated>2025-03-28T17:37:41+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2025-03-28T17:37:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=b8c86dc7699d3c561bcbee143d2022561d5cc8a3'/>
<id>b8c86dc7699d3c561bcbee143d2022561d5cc8a3</id>
<content type='text'>
In 236f938ef, I introduced a generic version of this routine. I believe
that the SystemZ specific version of this is less general than the
generic version, and is thus unrequired. I wasn't 100% given the
difference in sub-register, multiple use and defs, but from the SystemZ
code, it looks like those cases simply don't arise?</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In 236f938ef, I introduced a generic version of this routine. I believe
that the SystemZ specific version of this is less general than the
generic version, and is thus unrequired. I wasn't 100% given the
difference in sub-register, multiple use and defs, but from the SystemZ
code, it looks like those cases simply don't arise?</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] Add `is(LoadFrom|StoreTo)StackSlotPostFE` to SystemZBackend (#132928)</title>
<updated>2025-03-25T14:03:54+00:00</updated>
<author>
<name>Dominik Steenken</name>
<email>dost@de.ibm.com</email>
</author>
<published>2025-03-25T14:03:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f24cf59d7afbfcefe43086c2e0984992deec3678'/>
<id>f24cf59d7afbfcefe43086c2e0984992deec3678</id>
<content type='text'>
As part of an effort to enable instr-ref-based debug value tracking,
this PR implements `SystemZInstrInfo::isLoadFromStackSlotPostFE`, as
well as `SystemZInstrInfo::isStoreToStackSlotPostFE`. The implementation
relies upon the presence of MachineMemoryOperands on the relevant
`MachineInstr`s in order to access the `FrameIndex` post frame index
elimination.

Since these new functions are only meant to be called after frame-index
elimination, they assert against the present of a frame index on the
base register operand of the instruction.

Outside of the utility of these functions to enable instr-ref-based
debug value tracking, they also changes the behavior of the AsmPrinter,
since it will now be able to properly detect non-folded spills and
reloads, so this changes a number of tests that were checking
specifically for folded reloads.

Note that there are some tests that still check for `vst` and `vl` as
folded spills/reloads even though they should be straight reloads. This
will be addressed in a future PR.

Co-authored-by: Dominik Steenken &lt;dominik.steenken@gmail.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As part of an effort to enable instr-ref-based debug value tracking,
this PR implements `SystemZInstrInfo::isLoadFromStackSlotPostFE`, as
well as `SystemZInstrInfo::isStoreToStackSlotPostFE`. The implementation
relies upon the presence of MachineMemoryOperands on the relevant
`MachineInstr`s in order to access the `FrameIndex` post frame index
elimination.

Since these new functions are only meant to be called after frame-index
elimination, they assert against the present of a frame index on the
base register operand of the instruction.

Outside of the utility of these functions to enable instr-ref-based
debug value tracking, they also changes the behavior of the AsmPrinter,
since it will now be able to properly detect non-folded spills and
reloads, so this changes a number of tests that were checking
specifically for folded reloads.

Note that there are some tests that still check for `vst` and `vl` as
folded spills/reloads even though they should be straight reloads. This
will be addressed in a future PR.

Co-authored-by: Dominik Steenken &lt;dominik.steenken@gmail.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>[SystemZ] Implement basic `isCopyInstrImpl` (#132903)</title>
<updated>2025-03-25T14:00:54+00:00</updated>
<author>
<name>Dominik Steenken</name>
<email>dost@de.ibm.com</email>
</author>
<published>2025-03-25T14:00:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c0a7ccb59acfe90de38c580f52f2691c00f7ea9c'/>
<id>c0a7ccb59acfe90de38c580f52f2691c00f7ea9c</id>
<content type='text'>
As a first step toward implementing SystemZ support for instr-ref-based
debug info tracking, this commit adds a basic implementation for the
previously absent `SystemZInstrInfo::isCopyInstrImpl`.

This is accomplished by adding a new flag called `isMoveReg` on the
relevant instructions and calling upon that bit of information to
implement the function. Which instructions to add the flag to was based
on the implementation of `SystemZInstrInfo::copyPhysReg`. The full list
of instructions is as follows:

#### General-Purpose Registers
- `lr`
- `lgr`
#### Floating Point Registers
- `ler`
- `ldr`
- `lxr`
#### Vector Registers
- `vlr`</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As a first step toward implementing SystemZ support for instr-ref-based
debug info tracking, this commit adds a basic implementation for the
previously absent `SystemZInstrInfo::isCopyInstrImpl`.

This is accomplished by adding a new flag called `isMoveReg` on the
relevant instructions and calling upon that bit of information to
implement the function. Which instructions to add the flag to was based
on the implementation of `SystemZInstrInfo::copyPhysReg`. The full list
of instructions is as follows:

#### General-Purpose Registers
- `lr`
- `lgr`
#### Floating Point Registers
- `ler`
- `ldr`
- `lxr`
#### Vector Registers
- `vlr`</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen] Change copyPhysReg interface to use Register instead of MCRegister. (#128473)</title>
<updated>2025-02-24T17:55:34+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-02-24T17:55:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=571b787b83cb1bfc7d4c8214b296ec965e7bb7e2'/>
<id>571b787b83cb1bfc7d4c8214b296ec965e7bb7e2</id>
<content type='text'>
NVPTX, SPIRV, and WebAssembly pass virtual registers to this function
since they don't perform register allocation. We need to use Register to
avoid a virtual register being converted to MCRegister by the caller.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
NVPTX, SPIRV, and WebAssembly pass virtual registers to this function
since they don't perform register allocation. We need to use Register to
avoid a virtual register being converted to MCRegister by the caller.</pre>
</div>
</content>
</entry>
</feed>
