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<title>llvm-project.git/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)</title>
<updated>2025-05-23T15:30:29+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-05-23T15:30:29+00:00</published>
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<entry>
<title>[NFC][LLVM][PowerPC] Cleanup pass initialization for PowerPC (#134422)</title>
<updated>2025-04-14T16:18:39+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-04-14T16:18:39+00:00</published>
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<id>fef5b6f9530c52d623f4729900855e626d5ee722</id>
<content type='text'>
- Remove calls to pass initialization from pass constructors.
- https://github.com/llvm/llvm-project/issues/111767</content>
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<pre>
- Remove calls to pass initialization from pass constructors.
- https://github.com/llvm/llvm-project/issues/111767</pre>
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</entry>
<entry>
<title>[PowerPC] Remove unused includes (NFC) (#116163)</title>
<updated>2024-11-14T15:55:18+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-14T15:55:18+00:00</published>
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Identified with misc-include-cleaner.</content>
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Identified with misc-include-cleaner.</pre>
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</entry>
<entry>
<title>[Target] Use StringRef::operator== instead of StringRef::equals (NFC) (#91072) (#91138)</title>
<updated>2024-05-05T20:43:10+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-05-05T20:43:10+00:00</published>
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<content type='text'>
I'm planning to remove StringRef::equals in favor of
StringRef::operator==.

- StringRef::operator==/!= outnumber StringRef::equals by a factor of
  38 under llvm/ in terms of their usage.

- The elimination of StringRef::equals brings StringRef closer to
  std::string_view, which has operator== but not equals.

- S == "foo" is more readable than S.equals("foo"), especially for
  !Long.Expression.equals("str") vs Long.Expression != "str".</content>
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<pre>
I'm planning to remove StringRef::equals in favor of
StringRef::operator==.

- StringRef::operator==/!= outnumber StringRef::equals by a factor of
  38 under llvm/ in terms of their usage.

- The elimination of StringRef::equals brings StringRef closer to
  std::string_view, which has operator== but not equals.

- S == "foo" is more readable than S.equals("foo"), especially for
  !Long.Expression.equals("str") vs Long.Expression != "str".</pre>
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</content>
</entry>
<entry>
<title>[CodeGen] Make the parameter TRI required in some functions. (#85968)</title>
<updated>2024-04-24T13:24:14+00:00</updated>
<author>
<name>Xu Zhang</name>
<email>simonzgx@gmail.com</email>
</author>
<published>2024-04-24T13:24:14+00:00</published>
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Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.</content>
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Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.</pre>
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</entry>
<entry>
<title>[PowerPC] redesign the target flags (#69695)</title>
<updated>2023-12-07T04:47:25+00:00</updated>
<author>
<name>Chen Zheng</name>
<email>czhengsz@cn.ibm.com</email>
</author>
<published>2023-12-07T04:47:25+00:00</published>
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12 bit is not enough for PPC's target specific flags. If 8 bit for the
bitmask flags, 4 bit for the direct mask, PPC can total have 16 direct
mask and 8 bitmask. Not enough for PPC, see this issue in
https://github.com/llvm/llvm-project/pull/66316

Redesign how PPC target set the target specific flags. With this patch,
all ppc target flags are direct flags. No bitmask flag in PPC anymore.

This patch aligns with some targets like X86 which also has many target
specific flags.

The patch also fixes a bug related to flag `MO_TLSGDM_FLAG` and `MO_LO`.
They are the same value and the test case changes in this PR shows the
bug.</content>
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<pre>
12 bit is not enough for PPC's target specific flags. If 8 bit for the
bitmask flags, 4 bit for the direct mask, PPC can total have 16 direct
mask and 8 bitmask. Not enough for PPC, see this issue in
https://github.com/llvm/llvm-project/pull/66316

Redesign how PPC target set the target specific flags. With this patch,
all ppc target flags are direct flags. No bitmask flag in PPC anymore.

This patch aligns with some targets like X86 which also has many target
specific flags.

The patch also fixes a bug related to flag `MO_TLSGDM_FLAG` and `MO_LO`.
They are the same value and the test case changes in this PR shows the
bug.</pre>
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</content>
</entry>
<entry>
<title>[llvm] Stop including llvm/ADT/DenseMap.h (NFC)</title>
<updated>2023-11-11T18:07:19+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2023-11-11T18:07:19+00:00</published>
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<id>d4360e428ffd3fffcd587e4b5de913d9ca37dd55</id>
<content type='text'>
Ientified with clangd.
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Ientified with clangd.
</pre>
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</entry>
<entry>
<title>[PowerPC] Improve kill flag computation and add verification after MI peephole</title>
<updated>2023-09-22T19:26:39+00:00</updated>
<author>
<name>Nemanja Ivanovic</name>
<email>nemanja.i.ibm@gmail.com</email>
</author>
<published>2023-09-22T17:37:55+00:00</published>
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The MI Peephole pass has grown to include a large number of transformations over the years. Many of the transformations require re-computation of kill flags but don't do a good job of re-computing them. This causes us to have very common failures when the compiler is built with expensive checks. Over time, we added and augmented a function that is supposed to go and fix up kill flags after each transformation but we keep missing cases.
This patch does the following:
- Removes the function to re-compute kill flags
- Adds LiveVariables to compute and maintain kill flags while transforming code
- Adds re-computation of kill flags for the post-RA peepholes for each block that contains a transformed instruction

Reviewed By: stefanp

Differential Revision: https://reviews.llvm.org/D133103
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The MI Peephole pass has grown to include a large number of transformations over the years. Many of the transformations require re-computation of kill flags but don't do a good job of re-computing them. This causes us to have very common failures when the compiler is built with expensive checks. Over time, we added and augmented a function that is supposed to go and fix up kill flags after each transformation but we keep missing cases.
This patch does the following:
- Removes the function to re-compute kill flags
- Adds LiveVariables to compute and maintain kill flags while transforming code
- Adds re-computation of kill flags for the post-RA peepholes for each block that contains a transformed instruction

Reviewed By: stefanp

Differential Revision: https://reviews.llvm.org/D133103
</pre>
</div>
</content>
</entry>
<entry>
<title>[PowerPC] Optimize compare by using record form in post-RA.</title>
<updated>2022-10-31T05:33:50+00:00</updated>
<author>
<name>esmeyi</name>
<email>esme.yi@ibm.com</email>
</author>
<published>2022-10-31T05:33:50+00:00</published>
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Summary: We currently optimize the comparison only in SSA, therefore we will miss some optimization opportunities where the input of comparison is lowered from COPY in post-RA.
Ie. ExpandPostRA::LowerCopy is called after PPCInstrInfo::optimizeCompareInstr.
This patch optimizes the comparison in post-RA and only the cases that compare against zero can be handled.
D131374 converts the comparison and its user to a compare against zero with the appropriate predicate on the branch, which creates additional opportunities for this patch.

Reviewed By: shchenz, lkail

Differential Revision: https://reviews.llvm.org/D131873
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Summary: We currently optimize the comparison only in SSA, therefore we will miss some optimization opportunities where the input of comparison is lowered from COPY in post-RA.
Ie. ExpandPostRA::LowerCopy is called after PPCInstrInfo::optimizeCompareInstr.
This patch optimizes the comparison in post-RA and only the cases that compare against zero can be handled.
D131374 converts the comparison and its user to a compare against zero with the appropriate predicate on the branch, which creates additional opportunities for this patch.

Reviewed By: shchenz, lkail

Differential Revision: https://reviews.llvm.org/D131873
</pre>
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</content>
</entry>
<entry>
<title>[llvm] Fix comment typos (NFC)</title>
<updated>2022-08-07T07:16:14+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-08-07T07:16:14+00:00</published>
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