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<title>llvm-project.git/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>PowerPC: Remove redundant MCSymbolRefExpr::VariantKind casts</title>
<updated>2025-06-27T07:28:41+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-06-27T07:28:41+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>PowerPC: Move PPCMCExpr into PPCMCAsmInfo</title>
<updated>2025-06-26T07:11:04+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-06-26T07:11:04+00:00</published>
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<id>418c5de19bbda6cc4dfdd8625465e2385561d75f</id>
<content type='text'>
to align with targets that have made the transition.
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<pre>
to align with targets that have made the transition.
</pre>
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</content>
</entry>
<entry>
<title>PowerPC: Migrate to newer relocation specifier representation</title>
<updated>2025-06-15T21:51:20+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-06-15T21:51:20+00:00</published>
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<id>f4a63523b88631e224496435bea0940ac05897bf</id>
<content type='text'>
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Replace PPCMCExpr with MCSpecifierExpr.
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* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Replace PPCMCExpr with MCSpecifierExpr.
</pre>
</div>
</content>
</entry>
<entry>
<title>PowerPC: Rename PPCMCExpr::VK_ to PPC::S_</title>
<updated>2025-06-15T20:17:22+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-06-15T20:17:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=b839632bf44f56e6f17777857f4b23d4eccb6f33'/>
<id>b839632bf44f56e6f17777857f4b23d4eccb6f33</id>
<content type='text'>
Prepare for removing PPCMCExpr. Adopt the newer naming convention with
AMDGPU/WebAssembly/VE/M68k.
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Prepare for removing PPCMCExpr. Adopt the newer naming convention with
AMDGPU/WebAssembly/VE/M68k.
</pre>
</div>
</content>
</entry>
<entry>
<title>[PowerPC] Intrinsics and tests for dmr insert/extract (#135653)</title>
<updated>2025-04-24T15:27:22+00:00</updated>
<author>
<name>RolandF77</name>
<email>55763885+RolandF77@users.noreply.github.com</email>
</author>
<published>2025-04-24T15:27:22+00:00</published>
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<id>a903c7b7f5d1cb8d72c170d494d94dc251fc7204</id>
<content type='text'>
Add some intrinsics and LIT tests for PPC dmr insert/extract
instructions.</content>
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<pre>
Add some intrinsics and LIT tests for PPC dmr insert/extract
instructions.</pre>
</div>
</content>
</entry>
<entry>
<title>[PowerPC] Rename VariantKind to Specifier</title>
<updated>2025-03-21T04:40:57+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-03-21T04:40:56+00:00</published>
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<id>c2692afc0a92cd5da140dfcdfff7818a5b8ce997</id>
<content type='text'>
Follow the X86 and Mips renaming.

&gt; "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
&gt; "Relocation specifier" is clear, aligns with Arm and IBM’s usage, and fits the assembler's role seamlessly.

In addition, rename *MCExpr::getKind, which confusingly shadows the base class getKind.
</content>
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<pre>
Follow the X86 and Mips renaming.

&gt; "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
&gt; "Relocation specifier" is clear, aligns with Arm and IBM’s usage, and fits the assembler's role seamlessly.

In addition, rename *MCExpr::getKind, which confusingly shadows the base class getKind.
</pre>
</div>
</content>
</entry>
<entry>
<title>Move PowerPC-specific MCSymbolRefExpr::VariantKind to PPCMCExpr</title>
<updated>2025-03-13T06:00:03+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-03-13T06:00:02+00:00</published>
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<id>5d5f16204f17eae903d5cead75f31a41e7e960d4</id>
<content type='text'>
Most changes are mechanic, except:

* ELFObjectWriter::shouldRelocateWithSymbol: .TOC.@tocbase does not
  register the undefined symbol.  Move the handling into the
  Sym-&gt;isUndefined() code path.
* ELFObjectWriter::fixSymbolsInTLSFixups's VK_PPC* cases are moved to
  PPCELFObjectWriter::getRelocType. We should do similar refactoring
  for other targets and eventually remove fixSymbolsInTLSFixups.

In the future, we should classify PPCMCExpr similar to AArch64MCExpr.
</content>
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<pre>
Most changes are mechanic, except:

* ELFObjectWriter::shouldRelocateWithSymbol: .TOC.@tocbase does not
  register the undefined symbol.  Move the handling into the
  Sym-&gt;isUndefined() code path.
* ELFObjectWriter::fixSymbolsInTLSFixups's VK_PPC* cases are moved to
  PPCELFObjectWriter::getRelocType. We should do similar refactoring
  for other targets and eventually remove fixSymbolsInTLSFixups.

In the future, we should classify PPCMCExpr similar to AArch64MCExpr.
</pre>
</div>
</content>
</entry>
<entry>
<title>[IR] Don't include Module.h in Analysis.h (NFC) (#97023)</title>
<updated>2024-06-28T12:30:47+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2024-06-28T12:30:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=4169338e75cdce73d34063532db598c95ee82ae4'/>
<id>4169338e75cdce73d34063532db598c95ee82ae4</id>
<content type='text'>
Replace it with a forward declaration instead. Analysis.h is pulled in
by all passes, but not all passes need to access the module.</content>
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<pre>
Replace it with a forward declaration instead. Analysis.h is pulled in
by all passes, but not all passes need to access the module.</pre>
</div>
</content>
</entry>
<entry>
<title>[PowerPC] Tune AIX shared library TLS model at function level (#84132)</title>
<updated>2024-05-09T01:50:36+00:00</updated>
<author>
<name>Felix (Ting Wang)</name>
<email>Ting.Wang.SH@ibm.com</email>
</author>
<published>2024-05-09T01:50:36+00:00</published>
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<id>ea126aebdc9d8205016f355d85dbf1c15f2f4b28</id>
<content type='text'>
Under some circumstance (library loaded with the main program), TLS
initial-exec model can be applied to local-dynamic access(es). We
could use some simple heuristic to decide the update at function level:
* If there is equal or less than a number of TLS local-dynamic access(es)
in the function, use TLS initial-exec model. (the threshold which default to
1 is controlled by hidden option)</content>
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<pre>
Under some circumstance (library loaded with the main program), TLS
initial-exec model can be applied to local-dynamic access(es). We
could use some simple heuristic to decide the update at function level:
* If there is equal or less than a number of TLS local-dynamic access(es)
in the function, use TLS initial-exec model. (the threshold which default to
1 is controlled by hidden option)</pre>
</div>
</content>
</entry>
<entry>
<title>[PowerPC][AIX] Enable aix-small-local-dynamic-tls target attribute (#86641)</title>
<updated>2024-04-12T00:18:01+00:00</updated>
<author>
<name>Felix (Ting Wang)</name>
<email>Ting.Wang.SH@ibm.com</email>
</author>
<published>2024-04-12T00:18:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=09d51a841dcfbc41c3d7f3274b109b5f9fb09bb0'/>
<id>09d51a841dcfbc41c3d7f3274b109b5f9fb09bb0</id>
<content type='text'>
Following the aix-small-local-exec-tls target attribute, this patch adds
a target attribute for an AIX-specific option in llc that informs the
compiler that it can use a faster access sequence for the local-dynamic
TLS model (formally named aix-small-local-dynamic-tls) when TLS
variables are less than ~32KB in size.

The patch either produces an addi/la with a displacement off of module
handle (return value from .__tls_get_mod) when the address is
calculated, or it produces an addi/la followed by a load/store when the
address is calculated and used for further accesses.

---------

Co-authored-by: Amy Kwan &lt;amy.kwan1@ibm.com&gt;</content>
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<pre>
Following the aix-small-local-exec-tls target attribute, this patch adds
a target attribute for an AIX-specific option in llc that informs the
compiler that it can use a faster access sequence for the local-dynamic
TLS model (formally named aix-small-local-dynamic-tls) when TLS
variables are less than ~32KB in size.

The patch either produces an addi/la with a displacement off of module
handle (return value from .__tls_get_mod) when the address is
calculated, or it produces an addi/la followed by a load/store when the
address is calculated and used for further accesses.

---------

Co-authored-by: Amy Kwan &lt;amy.kwan1@ibm.com&gt;</pre>
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</entry>
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