<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm-project.git/llvm/lib/Target/Mips/MipsSubtarget.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>Revert "Mips: Force 64bit subtarget feature to be set for ABI options (#157446)" (#157833)</title>
<updated>2025-09-10T11:43:53+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-09-10T11:43:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=be773c1554b54fee3ef60e87097494a5139f1ec2'/>
<id>be773c1554b54fee3ef60e87097494a5139f1ec2</id>
<content type='text'>
This reverts commit 7768cca2c6617523e38ba9a8a3e8366752992ec5.

This is less necessary after 7f4c297e94dd604d66429dd0eb85c79e4d8c50a9</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit 7768cca2c6617523e38ba9a8a3e8366752992ec5.

This is less necessary after 7f4c297e94dd604d66429dd0eb85c79e4d8c50a9</pre>
</div>
</content>
</entry>
<entry>
<title>Mips: Force 64bit subtarget feature to be set for ABI options (#157446)</title>
<updated>2025-09-09T02:15:35+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-09-09T02:15:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7768cca2c6617523e38ba9a8a3e8366752992ec5'/>
<id>7768cca2c6617523e38ba9a8a3e8366752992ec5</id>
<content type='text'>
Prepare to use this with HwMode. This is mostly code copied from x86.

Mips has an exceptionally broken system where the target-abi option
can be used to change the pointer size. i.e., you can mix and match
32-bit base triples with an explicit request to use 32-bit or 64-bit
pointers such that you cannot rely on the triple reported pointer size.
This hack manages to only work for codegen. The MC subtarget
constructors
do not have access to the target-abi name so those will continue to not
have the appropriate feature set.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Prepare to use this with HwMode. This is mostly code copied from x86.

Mips has an exceptionally broken system where the target-abi option
can be used to change the pointer size. i.e., you can mix and match
32-bit base triples with an explicit request to use 32-bit or 64-bit
pointers such that you cannot rely on the triple reported pointer size.
This hack manages to only work for codegen. The MC subtarget
constructors
do not have access to the target-abi name so those will continue to not
have the appropriate feature set.</pre>
</div>
</content>
</entry>
<entry>
<title>Mips/X86: Use reportFatalUsageError for subtarget construction errors (#142028)</title>
<updated>2025-05-30T06:03:50+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-05-30T06:03:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=72a3c7610b4f97b43d5cd30f1d5b95bad5e77640'/>
<id>72a3c7610b4f97b43d5cd30f1d5b95bad5e77640</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[SelectionDAG] Add empty implementation of SelectionDAGInfo to some targets (#119968)</title>
<updated>2024-12-16T12:13:46+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2024-12-16T12:13:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=03847f19f2e462a339e1afa1093f253ec8a23765'/>
<id>03847f19f2e462a339e1afa1093f253ec8a23765</id>
<content type='text'>
#119969 adds a couple of new methods to this class, which will need to
be overridden by these targets.

Part of #119709.

Pull Request: https://github.com/llvm/llvm-project/pull/119968
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
#119969 adds a couple of new methods to this class, which will need to
be overridden by these targets.

Part of #119709.

Pull Request: https://github.com/llvm/llvm-project/pull/119968
</pre>
</div>
</content>
</entry>
<entry>
<title>[Mips] Remove unused includes (NFC) (#116499)</title>
<updated>2024-11-16T20:13:26+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-16T20:13:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=73e89cf66d4b88d568ff4c718ae7bf55588ef2be'/>
<id>73e89cf66d4b88d568ff4c718ae7bf55588ef2be</id>
<content type='text'>
Identified with misc-include-cleaner.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Identified with misc-include-cleaner.</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM][Mips][PowerPC] Remove unnecessary static_cast creating GISel InstructionSelector. NFC</title>
<updated>2024-07-10T17:28:32+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2024-07-10T17:23:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=0df714364a731822590b3da54f33ed0d6ddee873'/>
<id>0df714364a731822590b3da54f33ed0d6ddee873</id>
<content type='text'>
Some targets only pass a TargetMachine &amp; to their subtarget constructor
and require a static_cast to their target-specific TargetMachine subclass
to create *InstructionSelector.

These 3 targets already have the correct TargetMachine subclass
reference so no cast is needed.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some targets only pass a TargetMachine &amp; to their subtarget constructor
and require a static_cast to their target-specific TargetMachine subclass
to create *InstructionSelector.

These 3 targets already have the correct TargetMachine subclass
reference so no cast is needed.
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Support -m(no-)unaligned-access for r6 (#85174)</title>
<updated>2024-03-20T06:18:24+00:00</updated>
<author>
<name>YunQiang Su</name>
<email>syq@debian.org</email>
</author>
<published>2024-03-20T06:18:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=d7e28cd82bd3141093f96f7ce2e7b36f1b115fad'/>
<id>d7e28cd82bd3141093f96f7ce2e7b36f1b115fad</id>
<content type='text'>
MIPSr6 ISA requires normal load/store instructions support
misunaligned memory access, while it is not always do so
by hardware. On some microarchitectures or some corner cases
it may need support by OS.

Don't confuse with pre-R6's lwl/lwr famlily: MIPSr6 doesn't
support them, instead, r6 requires lw instruction support
misunaligned memory access. So, if -mstrict-align is used for
pre-R6, lwl/lwr won't be disabled.

If -mstrict-align is used for r6 and the access is not well
aligned, some lb/lh instructions will be used to replace lw.
This is useful for OS kernels.

To be back-compatible with GCC, -m(no-)unaligned-access are also
added as Neg-Alias of -m(no-)strict-align.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MIPSr6 ISA requires normal load/store instructions support
misunaligned memory access, while it is not always do so
by hardware. On some microarchitectures or some corner cases
it may need support by OS.

Don't confuse with pre-R6's lwl/lwr famlily: MIPSr6 doesn't
support them, instead, r6 requires lw instruction support
misunaligned memory access. So, if -mstrict-align is used for
pre-R6, lwl/lwr won't be disabled.

If -mstrict-align is used for r6 and the access is not well
aligned, some lb/lh instructions will be used to replace lw.
This is useful for OS kernels.

To be back-compatible with GCC, -m(no-)unaligned-access are also
added as Neg-Alias of -m(no-)strict-align.</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)</title>
<updated>2023-09-14T21:10:14+00:00</updated>
<author>
<name>Arthur Eubanks</name>
<email>aeubanks@google.com</email>
</author>
<published>2023-09-14T21:10:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=0a1aa6cda2758b0926a95f87d39ffefb1cb90200'/>
<id>0a1aa6cda2758b0926a95f87d39ffefb1cb90200</id>
<content type='text'>
This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: allow o32 abi with 64bit CPU and 64 abi with 32bit triple</title>
<updated>2023-05-16T22:31:37+00:00</updated>
<author>
<name>YunQiang Su</name>
<email>wzssyqa@gmail.com</email>
</author>
<published>2023-05-16T22:31:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7983f8aca82e258174849f1cc6a70029353e9887'/>
<id>7983f8aca82e258174849f1cc6a70029353e9887</id>
<content type='text'>
In general, MIPS support ELF format like
   ELF 32-bit LSB relocatable, MIPS, MIPS64 rel2 version 1 (SYSV)
and Linux's VDSO uses it.

Currently clang stop CMDs like
    clang -march=mips64r2 -mabi=32

While it is not needed now, since the the backend support the combination now.

This patch also allows something like
     clang --target=mipsel-linux-gnu -mabi=64
Since the triple can convert to right 64bit one automaticly.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D146269
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In general, MIPS support ELF format like
   ELF 32-bit LSB relocatable, MIPS, MIPS64 rel2 version 1 (SYSV)
and Linux's VDSO uses it.

Currently clang stop CMDs like
    clang -march=mips64r2 -mabi=32

While it is not needed now, since the the backend support the combination now.

This patch also allows something like
     clang --target=mipsel-linux-gnu -mabi=64
Since the triple can convert to right 64bit one automaticly.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D146269
</pre>
</div>
</content>
</entry>
<entry>
<title>[Support] Make report_fatal_error respect its GenCrashDiag argument so it doesn't generate a backtrace</title>
<updated>2022-05-30T18:19:23+00:00</updated>
<author>
<name>Nuno Lopes</name>
<email>nuno.lopes@tecnico.ulisboa.pt</email>
</author>
<published>2022-05-30T18:16:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=80b3dcc045f8ea6e5e532d8891bbf1305bce89e8'/>
<id>80b3dcc045f8ea6e5e532d8891bbf1305bce89e8</id>
<content type='text'>
There are a few places where we use report_fatal_error when the input is broken.
Currently, this function always crashes LLVM with an abort signal, which
then triggers the backtrace printing code.
I think this is excessive, as wrong input shouldn't give a link to
LLVM's github issue URL and tell users to file a bug report.
We shouldn't print a stack trace either.

This patch changes report_fatal_error so it uses exit() rather than
abort() when its argument GenCrashDiag=false.

Reviewed by: nikic, MaskRay, RKSimon

Differential Revision: https://reviews.llvm.org/D126550
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are a few places where we use report_fatal_error when the input is broken.
Currently, this function always crashes LLVM with an abort signal, which
then triggers the backtrace printing code.
I think this is excessive, as wrong input shouldn't give a link to
LLVM's github issue URL and tell users to file a bug report.
We shouldn't print a stack trace either.

This patch changes report_fatal_error so it uses exit() rather than
abort() when its argument GenCrashDiag=false.

Reviewed by: nikic, MaskRay, RKSimon

Differential Revision: https://reviews.llvm.org/D126550
</pre>
</div>
</content>
</entry>
</feed>
