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<title>llvm-project.git/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[Mips] Reserve hardware register HWR2 (#127775)</title>
<updated>2025-02-20T12:53:30+00:00</updated>
<author>
<name>yingopq</name>
<email>115543042+yingopq@users.noreply.github.com</email>
</author>
<published>2025-02-20T12:53:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=0c809ea336143f6118339521cbebe9e182e7a5e5'/>
<id>0c809ea336143f6118339521cbebe9e182e7a5e5</id>
<content type='text'>
Fix pr https://github.com/llvm/llvm-project/pull/127553.
x86_64 failed to run readcyclecounter.ll when enable expensive_check,
it would error "Using an undefined physical register".</content>
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<pre>
Fix pr https://github.com/llvm/llvm-project/pull/127553.
x86_64 failed to run readcyclecounter.ll when enable expensive_check,
it would error "Using an undefined physical register".</pre>
</div>
</content>
</entry>
<entry>
<title>[MC][CodeGen][Mips] Add CodeView mapping (#120877)</title>
<updated>2025-01-20T07:00:24+00:00</updated>
<author>
<name>Hervé Poussineau</name>
<email>hpoussin@reactos.org</email>
</author>
<published>2025-01-20T07:00:24+00:00</published>
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<id>be68f35bf55baf6150180170ec17371f0be90689</id>
<content type='text'>
Also add support for new relocation types required by debug information.

Constants have been taken from CodeView Symbolic Debug Information
Specification.</content>
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<pre>
Also add support for new relocation types required by debug information.

Constants have been taken from CodeView Symbolic Debug Information
Specification.</pre>
</div>
</content>
</entry>
<entry>
<title>[Mips] Remove unused includes (NFC) (#116499)</title>
<updated>2024-11-16T20:13:26+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-16T20:13:26+00:00</published>
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<id>73e89cf66d4b88d568ff4c718ae7bf55588ef2be</id>
<content type='text'>
Identified with misc-include-cleaner.</content>
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<pre>
Identified with misc-include-cleaner.</pre>
</div>
</content>
</entry>
<entry>
<title>[Mips] Remove MipsRegisterInfo::requiresRegisterScavenging. NFC.</title>
<updated>2023-05-15T16:30:33+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2023-05-15T16:29:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=101cdac93a626a597c410dfb80e459b5095ad614'/>
<id>101cdac93a626a597c410dfb80e459b5095ad614</id>
<content type='text'>
This method is unused since MipsRegisterInfo is abstract and it is
overridden in both concrete subclasses.
</content>
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<pre>
This method is unused since MipsRegisterInfo is abstract and it is
overridden in both concrete subclasses.
</pre>
</div>
</content>
</entry>
<entry>
<title>PEI should be able to use backward walk in replaceFrameIndicesBackward.</title>
<updated>2022-11-18T14:57:34+00:00</updated>
<author>
<name>Alexander Timofeev</name>
<email>alexander.timofeev@amd.com</email>
</author>
<published>2022-11-17T18:03:22+00:00</published>
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<id>32bd75716c27d1a094c2436529b596ce1547f6eb</id>
<content type='text'>
The backward register scavenger has correct register
liveness information. PEI should leverage the backward register scavenger.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D137574
</content>
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<pre>
The backward register scavenger has correct register
liveness information. PEI should leverage the backward register scavenger.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D137574
</pre>
</div>
</content>
</entry>
<entry>
<title>[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI</title>
<updated>2022-08-24T14:16:20+00:00</updated>
<author>
<name>Alex Richardson</name>
<email>alexrichardson@google.com</email>
</author>
<published>2022-08-24T13:42:50+00:00</published>
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<id>38107171ed56601773a5ac8d753463fa26542440</id>
<content type='text'>
This commit moves the information on whether a register is constant into
the Tablegen files to allow generating the implementaiton of
isConstantPhysReg(). I've marked isConstantPhysReg() as final in this
generated file to ensure that changes are made to tablegen instead of
overriding this function, but if that turns out to be too restrictive,
we can remove the qualifier.

This should be pretty much NFC, but I did notice that e.g. the AMDGPU
generated file also includes the LO16/HI16 registers now.

The new isConstant flag will also be used by D131958 to ensure that
constant registers are marked as call-preserved.

Differential Revision: https://reviews.llvm.org/D131962
</content>
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<pre>
This commit moves the information on whether a register is constant into
the Tablegen files to allow generating the implementaiton of
isConstantPhysReg(). I've marked isConstantPhysReg() as final in this
generated file to ensure that changes are made to tablegen instead of
overriding this function, but if that turns out to be too restrictive,
we can remove the qualifier.

This should be pretty much NFC, but I did notice that e.g. the AMDGPU
generated file also includes the LO16/HI16 registers now.

The new isConstant flag will also be used by D131958 to ensure that
constant registers are marked as call-preserved.

Differential Revision: https://reviews.llvm.org/D131962
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Expose the ZERO register as a constant physical register</title>
<updated>2022-08-02T17:04:52+00:00</updated>
<author>
<name>Guozhi Wei</name>
<email>carrot@google.com</email>
</author>
<published>2022-08-02T17:04:52+00:00</published>
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<id>85a6dd50adb22207a67619ff4fedcc4f48d021cb</id>
<content type='text'>
The ZERO register should be exposed as a constant physical register through the interface TargetRegisterInfo::isConstantPhysReg.

Differential Revision: https://reviews.llvm.org/D130932
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ZERO register should be exposed as a constant physical register through the interface TargetRegisterInfo::isConstantPhysReg.

Differential Revision: https://reviews.llvm.org/D130932
</pre>
</div>
</content>
</entry>
<entry>
<title>[Target] use range-based for loops (NFC)</title>
<updated>2022-01-08T05:20:36+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-01-08T05:20:36+00:00</published>
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<id>9d745828105097e04c7b757a9496c2450438399e</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions</title>
<updated>2021-03-30T16:31:39+00:00</updated>
<author>
<name>Tomas Matheson</name>
<email>tomas.matheson@arm.com</email>
</author>
<published>2021-03-15T13:01:34+00:00</published>
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<id>a9968c0a339ab47f5d6da1c513b2754f1e98a596</id>
<content type='text'>
Currently needsStackRealignment returns false if canRealignStack returns false.
This means that the behavior of needsStackRealignment does not correspond to
it's name and description; a function might need stack realignment, but if it
is not possible then this function returns false. Furthermore,
needsStackRealignment is not virtual and therefore some backends have made use
of canRealignStack to indicate whether a function needs stack realignment.

This patch attempts to clarify the situation by separating them and introducing
new names:

 - shouldRealignStack - true if there is any reason the stack should be
   realigned

 - canRealignStack - true if we are still able to realign the stack (e.g. we
   can still reserve/have reserved a frame pointer)

 - hasStackRealignment = shouldRealignStack &amp;&amp; canRealignStack (not target
   customisable)

Targets can now override shouldRealignStack to indicate that stack realignment
is required.

This change will make it easier in a future change to handle the case where we
need to realign the stack but can't do so (for example when the register
allocator creates an aligned spill after the frame pointer has been
eliminated).

Differential Revision: https://reviews.llvm.org/D98716

Change-Id: Ib9a4d21728bf9d08a545b4365418d3ffe1af4d87
</content>
<content type='xhtml'>
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<pre>
Currently needsStackRealignment returns false if canRealignStack returns false.
This means that the behavior of needsStackRealignment does not correspond to
it's name and description; a function might need stack realignment, but if it
is not possible then this function returns false. Furthermore,
needsStackRealignment is not virtual and therefore some backends have made use
of canRealignStack to indicate whether a function needs stack realignment.

This patch attempts to clarify the situation by separating them and introducing
new names:

 - shouldRealignStack - true if there is any reason the stack should be
   realigned

 - canRealignStack - true if we are still able to realign the stack (e.g. we
   can still reserve/have reserved a frame pointer)

 - hasStackRealignment = shouldRealignStack &amp;&amp; canRealignStack (not target
   customisable)

Targets can now override shouldRealignStack to indicate that stack realignment
is required.

This change will make it easier in a future change to handle the case where we
need to realign the stack but can't do so (for example when the register
allocator creates an aligned spill after the frame pointer has been
eliminated).

Differential Revision: https://reviews.llvm.org/D98716

Change-Id: Ib9a4d21728bf9d08a545b4365418d3ffe1af4d87
</pre>
</div>
</content>
</entry>
<entry>
<title>[Alignment][NFC] Add DebugStr and operator*</title>
<updated>2020-04-06T12:09:45+00:00</updated>
<author>
<name>Guillaume Chatelet</name>
<email>gchatelet@google.com</email>
</author>
<published>2020-04-06T10:08:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ff858d77810a5565a1f668c8e900a5e8659817be'/>
<id>ff858d77810a5565a1f668c8e900a5e8659817be</id>
<content type='text'>
Summary:
This is a roll forward of D77394 minus AlignmentFromAssumptions (which needs to be addressed separately)
Differences from D77394:
 - DebugStr() now prints the alignment value or `None` and no more `Align(x)` or `MaybeAlign(x)`
   - This is to keep Warning message consistent (CodeGen/SystemZ/alloca-04.ll)
 - Removed a few unneeded headers from Alignment (since it's included everywhere it's better to keep the dependencies to a minimum)

Reviewers: courbet

Subscribers: sdardis, hiraditya, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77537
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Summary:
This is a roll forward of D77394 minus AlignmentFromAssumptions (which needs to be addressed separately)
Differences from D77394:
 - DebugStr() now prints the alignment value or `None` and no more `Align(x)` or `MaybeAlign(x)`
   - This is to keep Warning message consistent (CodeGen/SystemZ/alloca-04.ll)
 - Removed a few unneeded headers from Alignment (since it's included everywhere it's better to keep the dependencies to a minimum)

Reviewers: courbet

Subscribers: sdardis, hiraditya, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77537
</pre>
</div>
</content>
</entry>
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