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<title>llvm-project.git/llvm/lib/Target/Mips/MipsMCInstLower.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>MIPS: Replace MipsMCExpr with MCSpecifierExpr</title>
<updated>2025-06-17T16:36:53+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-06-17T16:36:52+00:00</published>
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<entry>
<title>MIPS: Reduce MipsMCExpr uses</title>
<updated>2025-06-16T01:46:51+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-06-16T01:46:50+00:00</published>
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<entry>
<title>MIPS: Rename MipsMCExpr::MEK_ to Mips::S_</title>
<updated>2025-06-16T01:04:23+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-06-16T01:04:22+00:00</published>
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Prepare for removing MipsMCExpr. Adopt the newer naming convention (S_)
used by AMDGPU/WebAssembly/VE/M68k/PowerPC/LoongArch/RISCV.
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Prepare for removing MipsMCExpr. Adopt the newer naming convention (S_)
used by AMDGPU/WebAssembly/VE/M68k/PowerPC/LoongArch/RISCV.
</pre>
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</content>
</entry>
<entry>
<title>[Mips] Rename MipsExprKind to Specifier</title>
<updated>2025-03-21T04:19:20+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2025-03-21T04:19:20+00:00</published>
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Follow the X86 renaming.

&gt; "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
&gt; "Relocation specifier" is clear, aligns with Arm and IBM’s usage, and fits the assembler's role seamlessly.

In addition, rename MipsMCExpr::getKind, which confusingly shadows the base class getKind.
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<pre>
Follow the X86 renaming.

&gt; "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
&gt; "Relocation specifier" is clear, aligns with Arm and IBM’s usage, and fits the assembler's role seamlessly.

In addition, rename MipsMCExpr::getKind, which confusingly shadows the base class getKind.
</pre>
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</content>
</entry>
<entry>
<title>[Mips] Handle declspec(dllimport) on mipsel-windows-* triples (#120912)</title>
<updated>2025-01-21T08:18:02+00:00</updated>
<author>
<name>Hervé Poussineau</name>
<email>hpoussin@reactos.org</email>
</author>
<published>2025-01-21T08:18:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=26b87aad9e2d34d53df67522dc5aea5f7c54a458'/>
<id>26b87aad9e2d34d53df67522dc5aea5f7c54a458</id>
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On Windows, imported symbols must be searched with '__imp_' prefix.
Support imported global variables and imported functions.</content>
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On Windows, imported symbols must be searched with '__imp_' prefix.
Support imported global variables and imported functions.</pre>
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</content>
</entry>
<entry>
<title>[Target] Remove unnecessary includes (NFC)</title>
<updated>2023-12-08T05:03:56+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2023-12-08T05:03:56+00:00</published>
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<entry>
<title>[Target] Use range-based for loops (NFC)</title>
<updated>2021-11-27T19:16:19+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2021-11-27T19:16:18+00:00</published>
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<entry>
<title>Allow negative offsets in MipsMCInstLower::LowerOperand</title>
<updated>2019-12-04T11:30:00+00:00</updated>
<author>
<name>Alex Richardson</name>
<email>Alexander.Richardson@cl.cam.ac.uk</email>
</author>
<published>2019-12-04T10:06:24+00:00</published>
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Summary:
We rely on this in our CHERI backend to address the GOT by generating a
$pc-relative addresses. For this we emit the following code sequence:

lui $1, %pcrel_hi(_CHERI_CAPABILITY_TABLE_-8)
daddiu $1, $1, %pcrel_lo(_CHERI_CAPABILITY_TABLE_-4)
cgetpccincoffset $c1, $1

However, without this change the addend is implicitly converted to
UINT32_MAX and an invalid pointer value is generated.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: merge_guards_bot, sdardis, hiraditya, jrtc27, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70953
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Summary:
We rely on this in our CHERI backend to address the GOT by generating a
$pc-relative addresses. For this we emit the following code sequence:

lui $1, %pcrel_hi(_CHERI_CAPABILITY_TABLE_-8)
daddiu $1, $1, %pcrel_lo(_CHERI_CAPABILITY_TABLE_-4)
cgetpccincoffset $c1, $1

However, without this change the addend is implicitly converted to
UINT32_MAX and an invalid pointer value is generated.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: merge_guards_bot, sdardis, hiraditya, jrtc27, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70953
</pre>
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</entry>
<entry>
<title>Update the file headers across all of the LLVM projects in the monorepo</title>
<updated>2019-01-19T08:50:56+00:00</updated>
<author>
<name>Chandler Carruth</name>
<email>chandlerc@gmail.com</email>
</author>
<published>2019-01-19T08:50:56+00:00</published>
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to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
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to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
</pre>
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</content>
</entry>
<entry>
<title>[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25</title>
<updated>2019-01-17T21:50:37+00:00</updated>
<author>
<name>Vladimir Stefanovic</name>
<email>vladimir.stefanovic@rt-rk.com</email>
</author>
<published>2019-01-17T21:50:37+00:00</published>
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<id>3daf8bc96a121279030e93f4462ff4daa1ffa8e4</id>
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The callee address is added as an optional operand (MCSymbol) in
AdjustInstrPostInstrSelection() and then used by asm printer to insert:
'.reloc tmplabel, R_MIPS_JALR, symbol
tmplabel:'.
Controlled with '-mips-jalr-reloc', default is true.

Differential revision: https://reviews.llvm.org/D56694

llvm-svn: 351485
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The callee address is added as an optional operand (MCSymbol) in
AdjustInstrPostInstrSelection() and then used by asm printer to insert:
'.reloc tmplabel, R_MIPS_JALR, symbol
tmplabel:'.
Controlled with '-mips-jalr-reloc', default is true.

Differential revision: https://reviews.llvm.org/D56694

llvm-svn: 351485
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